Using Σ-Δ techniques in digitally controlled power supplies.

Transcription

Template reference : 100181658G-EN
Using Σ-Δ techniques
in digitally controlled
power supplies.
Thales Alenia Space ETCA
Ref :
HMCU-ETCA-SY-0036
07/12/2007 - Fossion Marc
Agenda of the presentation
Digital power control vs analog
Topology, advantages, DPWM, limit cycle
Sigma-Delta
Delta-Sigma, noise shaping, ADC & DAC
Σ-Δ power supplies
Noise shaping, feedforward
Sigma-Delta DPWM
Increasing resolution of DPWM
Increasing BW
Conclusions
2
Ref :
HMCU-ETCA-SY-0036
All rights reserved © 2008, Thales Alenia Space
Digital power converters
INPUT
POWER
IRONICALLY, PERHAPS, THE LAST
SUBSYSTEM TO UNDERGO A
SUBSTANTIVE SHIFT FROM AN
ANALOG- TO A DIGITAL-CONTROL
ARCHITECTURE IS THE MOST
UNIVERSAL: THE POWER SUPPLY.
BEWARE THE HYPE, HOWEVER.
DIGITAL POWER CONTROL MAY BRING
PERFORMANCE BENEFITS TO SOME
APPLICATIONS, BUT UNTIL YOU
BECOME FAMILIAR WITH THE INNER
MACHINATIONS, THEIR
SOPHISTICATION WILL EXACT A PRICE
IN APPLICATION-DEVELOPMENT TIME.
1. Power
Inductor
3. Power
Semiconductors
2 Power
Capacitor
OUTPUT
POWER
4. Low
Level
Control
A BIT OF POWER digitally controlled power conversion
JULY 21, 2005 | EDN 59-66
BY JOSHUA ISRAELSOHN • TECHNICAL EDITOR
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HMCU-ETCA-SY-0036
Analog & digital control
An analog SMPS control loop
compares a scaled sample of
the output voltage with a
fixed reference and servos
the PWM timing to force the
two quantities to match.
A digital SMPS control loop
replaces the error amplifier
with an ADC. The digital PWM
requires a high-speed clock to
provide the necessary edgetiming resolution.
JULY 21, 2005 | EDN 59-66
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HMCU-ETCA-SY-0036
Largest potential to benefit from
digital power
National Semiconductor
Digital Power Europe conference November 2007
by Juha Pennanen• System Application Manager
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HMCU-ETCA-SY-0036
Limit Cycle problem
The ADC determines the resolution of the
output-voltage setting. Calculate minimum
resolution from your nominal output voltage,
VO, and the setting resolution.
The DPWM essentially translates bits of amplitude into bits
of time. To prevent limit-cycle oscillations in the output,
quantizers that follow the ADC, including the DPWM, must
exhibit a greater resolution than the ADC (Figure 3). This
requirement ensures that a stable output value will exist for
each possible ADC quantity.
In a controller that follows an 10-bit DAC
with a 11-bit DPWM controlling a power
section with a 250kHz switching rate, the
DPWM timing resolution is: … <<2 nSec
25.104 x 211 = 512 MHz clock rate DPWM !
6
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JULY 21, 2005 | EDN 59-66
Power consumption !!!
HMCU-ETCA-SY-0036
Sigma-Delta
Sigma-Delta DPWM
Increasing BW
Conclusions
7
Ref :
HMCU-ETCA-SY-0036
Delta modulation
Transmit a digital bit stream
Principles of Sigma-delta Modulation for ADC
Motorola application note
By Sangil Park, Ph. D.
Strategic Applications DSP
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HMCU-ETCA-SY-0036
Sigma-Delta (Σ−∆) Modulator
Unlike delta
modulators, Σ−∆
systems encode the
integral of the signal
itself and thus their
performance is
insensitive to the rate
of change of the
signal.
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Σ−∆ Modulation and Noise Shaping
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Σ−∆ Analog to digital converter
Digital
decimation filter
Integrator
+
Avin
ADC
-
DAC
FIR
Sigma
-delta
11
Dout
0010
0001
0000
1110
CLK
over- sampled
/ 2n
CLKout
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HMCU-ETCA-SY-0036
Σ−∆ Digital to analog converter
Digital
Input
Signal
Din
+
Truncate
Z-1
CLKin
12
x 2n
DAC
LPF
Avout
Delta sigma
over- sampled
Ref :
HMCU-ETCA-SY-0036
Sigma-Delta
Sigma-Delta DPWM
Increasing BW
Conclusions
13
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HMCU-ETCA-SY-0036
Digital PWM regulation
ADC
PID
regulator
Din
14
Vref
Vin
DPWM
Ref :
HMCU-ETCA-SY-0036
Sigma-Delta Power supply
ADC
Vref
PID
regulator
+
Din
Truncate
Z-1
CLKin
15
x 2n
Vin
DAC
LPF
Avout
Delta sigma
over- sampled
Ref :
HMCU-ETCA-SY-0036
“new” Sigma-Delta Power supply
ADC
Vref
PID
regulator
A NOVEL DELTA-SIGMA MODULATED DC-DC POWER
CONVERTER OPERATING UNDER DC RIPPLE VOLTAGE
Atsushi Hirotat, Satoshi Nagaitt, and Mutsuo Nakaokaftt
July 1999.
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HMCU-ETCA-SY-0036
“new” Sigma-Delta Power supply
A NOVEL DELTA-SIGMA MODULATED DC-DC POWER
CONVERTER OPERATING UNDER DC RIPPLE VOLTAGE
Atsushi Hirotat, Satoshi Nagaitt, and Mutsuo Nakaokaftt
July 1999.
Schulmeyer Kyle Thesis
A SIGMA-DELTA BASED DC-DC CONVERTER
December, 2007
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Sigma-Delta
Sigma-Delta DPWM
Increasing BW
Conclusions
18
Ref :
HMCU-ETCA-SY-0036
A signal sequence of the Σ-Δ DPWM
High-Frequency Digital Controller for DC-DC Converters
Based on Multi-Bit Sigma-Delta Pulse-Width Modulation
Zdravko Lukić, Kun Wang, and Aleksandar Prodić
Laboratory for Low-Power Management and Integrated SMPS
ECE Department, University of Toronto
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HMCU-ETCA-SY-0036
High Resolution DPWM
Error feedback delta-sigma modulator,
shaping the noise applied to the DPWM
High Resolution DPWM in a DC-DC Converter
Application Using Digital Sigma-Delta Techniques
Karl Rinne Dept. ECE & Anthony Kelly PTC Design Eng.
20
Ref :
2005 IEEE.
HMCU-ETCA-SY-0036
Prototype buck converter with Σ-Δ noise
shaped DPWM
In a dc-dc converter application that preprocessing
the duty-cycle value using a multi-bit digital sigmadelta modulator, before the DPWM increases the
effective resolution of the DPWM dramatically. A
prototype converter was seen to perform with an
effective DPWM resolution of at least 11 bits, with an
actual DPWM resolution of less than 6 bits.
High Resolution DPWM in a DC-DC Converter
Application Using Digital Sigma-Delta Techniques
Karl Rinne Dept. ECE & Anthony Kelly PTC Design Eng.
2005 IEEE.
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Ref :
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Dual mode & Σ-Δ
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Dual mode & Σ-Δ
As long as the error e[n] is
small, in the range of -2 to +2,
the compensator operates in
steady-state mode with low
power consumption.
Figure 4 shows block diagram of
the compensator for the case
when the effective 10-bit
resolution is obtained using a 4bit low-resolution DPWM.
23
Ref :
In the dynamic mode, using the multiplexer, the
hysteretic logic bridges the internal feedback of
the Σ-Δ DPWM. It also changes the clock rate of
the system, and alters the control law of the LUT.
In this mode, the fast DPWM inside the Σ-Δ DPWM
is fed by a low resolution control value ddy[n],
which is updated every switching cycle.
HMCU-ETCA-SY-0036
Dual mode & Σ-Δ
Steady-state closed-loop operation of
the Σ-Δ DPWM controller
24
Transient response for the load
change between 0.1 and 1A.
Ref :
HMCU-ETCA-SY-0036
Sigma-Delta
Noise shaping,
Sigma-Delta DPWM
Increasing BW
Conclusions
25
Ref :
HMCU-ETCA-SY-0036
Conclusions
Sigma-Delta techniques are know since long ago
Widely used in ADC & DAC …
Including digital audio power amplifiers
Digitally controlled power supplies
Need high frequency DPWM
Need high resolution DPWM
Spectral shaping properties seem not widely used ?
We perceive the use of Σ-Δ techniques to offer promising performances in
digitally controlled power supplies … however there is very little literature
& even less experience …
26
Ref :
HMCU-ETCA-SY-0036

Using Σ-Δ techniques in digitally controlled power supplies.

Transcription

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