Maxime Darnon
Transcription
Maxime Darnon
Maxime Darnon Phone: +33-438-783-511 e-mail: [email protected] Expert in Plasma Etching Processes. Experience: 2009 CNRS-LTM (French National Research Center), Grenoble, France. Researcher Analyze pulsed plasmas for micro/nano electronics application Investigate atomic scale etch processes Analyze plasma processes for Back End Of Line Characterize surfaces post etching processes Perform plasma diagnostics Supervise PhD students work 2008-2009: IBM Research, Yorktown Heights, NY, USA. Research Staff Member Developed processes for Back End Of Line technologies (Air-Gap, ULK) Supported IBM-Fishkill process development Supported IBM-Watson Microelectronics Research Lab process development Proposed new architectures and new processes for advanced devices integration 2007-2008: IMEC (Interuniversity Microelectronics Center), Leuven, Belgium. Etch process engineer Developed plasma processes for low-k integration. Developed processes for Air Gap integration Responsible for an etching tool (LRC Flex) 2004-2007: 2004: 2003: CNRS-LTM (French National Research Center), Grenoble, France. Ph.D. student, in the framework of a collaboration between CNRS, CEA-LETI and STMicroelectronics. Developed and optimized plasma processes (etch and ash) for porous low-k integration. Performed plasma analysis in industrial reactors (optical emission spectroscopy, ion mass spectrometry, ion flux measurements). Characterized materials (Chemical topography analyses by X-ray Photoelectron Spectrometry, X-ray reflectometry, spectroscopic ellipsometry, ellipsometric porosimetry, infrared spectroscopy, Scanning Electron Microscopy). Integrated new plasma processes for electrical characterization and failure analysis. Worked in an 8” & 12” clean room with industrial etchers (AMAT eMax and DPS, LRC Flex 45) and advanced in-line metrology tools. Supervised practical works in microelectronics (electrical characterization and simulation, technological simulation) for engineering school students. CNRS-LTM (French National Research Center), Grenoble, France. Engineering school year 3: 6-months project. 10nm Si-gate patterning for FEOL applications. Valeo, Creteil, France. [email protected] Page 1 of 13 3-months internship. Cost reduction solutions for air conditioning control panels used in automotive industry. Education: 204-2007: LTM-CNRS, Grenoble, France. Ph.D. in microelectronics technologies. Plasma challenges involved in the integration of porous low-k materials. 2001-2004: ENSERG-INPG, Grenoble, France. MSc Microelectronics, summa cum laude. Microelectronics, microsystems, electronics, physics, computer science. Languages: Native French speaker. Fluent in English. Miscellaneous: Member of the PESM conference committee since 2009 Member of the CSTIC scientific committee since 2010 Member of the committee of SPIE-AL dry etch symposium since 2012 Co-chair symposium III (dry and wet etch) of CSTIC since 2011. Reviewer for Journal of Vacuum Science and Technologies A and B Reviewer for IEEE Transactions on Plasma Science Reviewer for Applied Physics Letters Reviewer for Microelectronics Engineering Reviewer for Plasmas Sources Science and Technology Reviewer for Solid Sate Electronics Instructor at CEI Europe (Continuing Education Institute) since 2011: course #88 “Plasma Etching for CMOS Technology and ULSI Applications” Driving license Published work: - Journals (28): Ion flux and ion distribution function measurements in synchronously pulsed inductively coupled plasmas, M. Brihoum, G. Cunge, M. Darnon, D. Gahan, O. Joubert, N. SJ. Braithwaite, J. Vac. Sci. Technol. A 31(2), 020604 (2013), DOI:10.1116/1.4790364 Impact of low-k structure and porosity on etch processes, M. Darnon, N. Casiez, T. Chevolleau, G. Dubois, W. Volksen, T. J. Frot, R. Hurand, T. L. David, N. Posseme, N. Rochat, and C. Licitra, J. Vac. Sci. Technol. B 31, 011207 (2013), DOI:10.1116/1.4770505 Atomic-scale silicon etching control using pulsed Cl2 plasma, C. Petit-Etienne, M. Darnon, P. Bodart, M. Fouchier, G. Cunge, E. Pargon, L. Vallier, O. Joubert and S. Banna, J. Vac. Sci. Technol. B 31, 011201 (2013); http://dx.doi.org/10.1116/1.4768717 (8 pages) Integration of a manufacturing grade, k = 2.0 spin-on material in a single damascene structure, W. Volksen, S. Purushothaman, M. Darnon, M. F. Lofaro, S. A. Cohen, Maxime Darnon [email protected] page 2 of 13 J. P. Doyle, N. Fuller, T. P. Magbitang, P. M. Rice, L. E. Krupp, H. Nakagawa, Y. Nobe, T. Kokubo and G. J. M. Dubois. ECS J. Solid State Sci. Technol, 1(5), 2012, N85-N90. Silicon recess minimization during gate patterning using synchronous plasma pulsing, C. Petit-Etienne, E. Pargon, S. David, M. Darnon, L. Vallier and O. Joubert, J. Vac. Sci. Technol. B 30(4), Jul/Aug 2012, 040604; doi: 10.1116/1.4737125 Sidewall passivation layer thickness and composition profiles of etched silicon patterns from angle resolved x-ray photoelectron spectroscopy analysis, M.Haass, M. Darnon, O. Joubert, J. Appl. Phys. 111, 124905 (2012); doi: 10.1063/1.4729775 Pulsed high-density plasmas for advanced dry etching processes, S. Banna, A. Ankargul, G. Cunge, M. Darnon, E. Pargon, O. Joubert, J. Vac. Sci. Technol. A 30(4), Jul/Aug 2012 Etching mechanisms of thin SiO2 exposed to Cl2 plasma, C. Petit-Etienne, M. Darnon, L. Vallier, E. Pargon, G. Cunge, M. Fouchier, P. Bodart, M. Haass, M. Brihoum, O. Joubert, S. Banna, and T. Lill, J. Vac. Sci. Technol. B 29(5), 051202 (2011), Study of Porous SiOCH Patterning Using Metallic Hard Mask: Challenges and Solutions, N. Posseme, T. David, T. Chevolleau, , M. Darnon, F. Bailly, R. Bouyssou, J. Ducote, H. Chaabouni, M. El-kodadi, C. Licitra, C. Verove, O. Joubert, ECS Trans. 35 (4), May 2011, 667-685 Development of porosimetry techniques for the characterization of plasma-treated porous ultra low-k materials, C. Licitra, T. Chevolleau, R. Bouyssou, M. El kodadi, G. Haberfehlner, J. Hazart, L. Virot, M. Besacier, N. Posseme, M. Darnon, R. Hurand, P. Schiavone, F. Bertin, ECS Trans. 35 (4), May 2011, 729-756 Porous SiOCH Integration: Etch Challenges with a Trench First Metal Hard Mask Approach, N. Posseme, T. David, T. Chevolleau, , M. Darnon, P. Brun, M. Guillermet, J. P. Oddou, S. Barnola, F. Bailly, R. Bouyssou, J. Ducote, R. Hurand, C. Verove, O. Joubert, ECS Trans. 34 (1), May 2011, 389-394 Residue growth on metallic hard mask after dielectric etching in fluorocarbon based plasmas. II. Solutions, N. Posseme, R. Bouyssou, T. Chevolleau, T. David, V. Arnal, M. Darnon, Ph. Brun, C. Verove, O. Joubert, . Vac. Sci. Technol. B 29 (1), Jan/Feb 2011, 011018 Reducing damage to Si substrates during gate etching processes by synchronous plasma pulsing, C. Petit-Etienne, M. Darnon, L. Vallier, E. Pargon, G Cunge, F Boulard, S. Banna, T. Lill, O. Joubert, , J. Vac. Sci. Technol. B, 28(5), Sept/Oct 2010, pp 926-934 Roughening of porous SiCOH materials in fluorocarbon plasmas, F. Bailly, T. David, T. Chevolleau, M. Darnon, N. Posseme, R. Bouyssou, J. Ducote, O. Joubert, C. Cardineau, Journal of applied Physics, 108, June 2010, 014906 Synchronous Pulsed Plasma for Silicon Etch Applications, M. Darnon, C. Petit-Etienne, E. Pargon, G. Cunge, L. Vallier, P. Bodart, M. Haas, S. Banna, T. Lill, O. Joubert, ECS Trans. 27 (1), March 2010, 717-723 Patterning of porous SiOCH using an organic mask: Comparison with a metallic masking strategy, M. Darnon, T. Chevolleau, T. David, J. Ducote, N. Posseme, R. Bouyssou, F. Bailly, D. Perret, O. Joubert, J. Vac. Sci. Technol. B, 28(1), Jan/Feb 2010, pp 149-156 Maxime Darnon [email protected] page 3 of 13 Hydrogen Silsesquioxane-Based Hybrid Electron Beam And Optical Lithography For High Density Circuit Prototyping, M. Guillorn, J. Chang, N. Fuller, J. Patel, M. Darnon, A. Pyzyna, E. Joseph, S. Engelmann, J. Ott, J. Newbury, D. Klaus, J. Bucchignano, P. Joshi, C. Scerbo, E. Kratschmer, W. Graham, B. To, J. Parisi, Y. Zhang and W. Haensch, J. Vac. Sci. Technol. B, 27(6), Nov/Dec 2009, pp 2568-2592 Dielectric Reliability of 50nm Half Pitch Structures in Aurora® LK, S. Demuynck, H Kim, C. Huffman, M. Darnon, H .Struyf, J. Versluijs, M. Claes, G. Vereecke, P. Verdonck, H. Volders, N. Heylen, K. Kellens, D. De Roest, H. Sprey, G. Beyer, Japanese Journal of Applied Physics 48, April 2009, 04C018 Modification of dielectric films induced by plasma ashing process: hybrid versus porous SiOCH materials, M. Darnon, T. Chevolleau, T. David, N. Posseme, J. Ducote, C. Licitra, L. Vallier, O. Joubert, J. Torres, J. Vac. Sci. Technol. B, 26 (6), Nov. 2008, pp.1964-1970 Patterning of narrow porous SiOCH trenches using a TiN hard mask, M. Darnon, T. Chevolleau, D. Eon, R. Bouyssou, B. Pelissier, L. Vallier, O. Joubert, N. Posseme, T. David, F. Bailly, J. Torres, Microelectron. Eng. . 85(11), Nov 2008, pp 2226-2235 Efficiency of Reducing and Oxidizing Ash Plasmas in Preventing Metallic Barrier diffusion into Porous SiOCH, N. Posseme, T. Chevolleau, T. David, M. Darnon, J.P. Barnes, O. Louveau, C. Licitra, D. Jalabert, H. Feldis, M. Fayolle, O. Joubert, Microelectron. Eng. 85(8), June 2008, pp. 1842-1849 Evaluation of Ellipsometric porosimetry for in-line characterization of ultra-low-k dielectrics, C. Licitra, F. Bertin, M. Darnon, T. Chevolleau, C. Guedj, S. Cetre, H. Fontaine, A. Zenasni, L. L. Chapelon, Physica Status Solidi (c) 5 (5), May 2008, pp 1278-1282 Undulation of sub-100 nm porous dielectric structures: A mechanical analysis, M. Darnon, T. Chevolleau, O. Joubert, S. Maitrejean, J. C. Barbe, Appl. Phys. Let. 91, 2007, pp 194103194105 Mechanisms of porous dielectric modification induced by reducing and oxidizing ash plasmas, N. Posseme, T. Chevolleau, T. David, M. Darnon, O. Louveau, O. Joubert, J. Vac. Sci. Techno. B 25 (6), Nov/Dec 2007, pp 1928-1940 Analysis of chamber wall coatings during the patterning of ultralow-k materials with a metal hard mask: Consequences on cleaning strategies, T. Chevolleau, M. Darnon, T. David, N. Posseme, J. Torres, O. Joubert, J. Vac. Sci. Technol. B, Vol 25, May/Jun 2007, pp. 886-892 Etch mechanisms of hybrid low-k material (SiOCH with porogène) in fluorocarbon based plasma, D. Eon, M. Darnon, T. Chevolleau, T. David, L. Vallier, O. Joubert, J. Vac. Sci. Technol. B, Vol 25, May/Jun 2007, pp. 715-720 Etching Characteristics of TiN used as Hard Mask in Dielectric Etch Process, M. Darnon, T. Chevolleau, D. Eon, L. Vallier, J. Torres and O. Joubert, J. Vac. Sci. Technol. B, Vol 24, Sept/Oct 2006, pp. 2262-2270. Toward a Controlled Patterning of 10 nm Silicon Gates in High Density Plasmas, E. Pargon, M. Darnon, O. Joubert, T. Chevolleau, L. Vallier, L. Mollard and T. Lill, J. Vac. Sci. Technol. B, Vol 23, Sept/Oct 2005, pp. 1913-1923. - Conferences proceedings (11): Maxime Darnon [email protected] page 4 of 13 Low-k integration using metallic hard masks, O. Joubert, N. Posseme, T. Chevolleau, T. David, M. Darnon, Ultra Clean Processing of Semiconductor Surfaces XI, Solid State Phenomena 195, 193-195, DOI: 10.4028/www.scientific.net/SSP.187.193 Towards new plasma technologies for 22nm gate etch processes and beyond, O. Joubert, M. Darnon, G. Cunge, E. Pargon, T. David, C. Petit-Etienne, L. Vallier, N. Posseme, P. Bodart, L. Azarnouche, R. Blanc, M. Haas, M. Brihoum, S. Banna, T. Lill, Proceedings of the SPIE - The International Society for Optical Engineering Volume: 8328 Pages: 83280D (10 pp.) Published: 2012 DOI: 10.1117/12.920312 Self-assembly patterning using block copolymer for advanced CMOS technology: optimisation of plasma etching process, T. Chevolleau, G. Cunge, M. Delalande,, X. Chevalier, R. Tiron, S. David, M. Darnon and C. Navarro, Proceedings of the SPIE - The International Society for Optical Engineering Volume: 8328 Pages: 83280M (6 pp.) Published: 2012 DOI: 10.1117/12.91639 Impact of ambient atmosphere on plasma-damaged porous low-k characterization, M. Darnon, T. Chevolleau, T. David, N. Posseme, R. Bouyssou, R. Hurand, O. Joubert, C. Licitra, N. Rochat, F. Bailly, C. Verove, Interconnect Technology Conference and 2011 Materials for Advanced Metallization (IITC/MAM), 2011 IEEE International, May 2011, 5940348 Scatterometric Porosimetry for porous low-k patterns characterization, R. Hurand, R. Bouyssou, M. Darnon, C. Tiphine, C. Licitra, M. El-kodadi, T. Chevolleau, T. David, N. Posseme, M. Besacier, P. Schiavone, F. Bailly, O. Joubert, C. Verove, , Interconnect Technology Conference and 2011 Materials for Advanced Metallization (IITC/MAM), 2011 IEEE International, May 2011, 5940350 Etching Process Scalability and Challenges for ULK Materials, T. Chevolleau, N. Posseme, T. David, R. Bouyssou, J. Ducote, F. Bailly, M. Darnon, M. El Kodadi, M. Besacier, C. Licitra, M. Guillermet, A. Ostrovsky, C. Verove, O. Joubert, Proceeding of IEEE International Interconnect Technology Conference, IITC 2010, June 2010 (Invited Contribution). Pulsed plasmas for nanoCMOS and nanoelectronics devices elaboration, E. Pargon, G. Cunge, M. Darnon, L. Vallier, P. Bodart, C. Petit-Etienne, M. Haass, O. Luere, M. Brihoum, T. David, T. Chevolleau, O. Joubert, iPlasmaNanoII, December 12th-15th, (invited contribution) Trigate 6T SRAM scaling to 0.06 μm2, M. Guillorn, J. Chang, A. Pyzyna, S. U. Engelmann, E. Joseph, B. Fletcher, C. Cabral Jr., C.-H. Lin, A. Bryant, M. Darnon, J. Ott, C. Lavoie, M. Frank, L. Gignac, J. Newbury, C. Wang, D. Klaus, E. Kratschmer, J. Bucchignano, B. N. To, W. Graham, I. Lauer, E. Sikorski, S. Carter, V. Narayanan, N. Fuller, Y. Zhang, W. Haensch, Proceeding of 2009 International Electron Devices Meeting, IEDM 2009, December 2009. Plasma Etching Challenges for Porous SiOCH Integration In Advanced Interconnect Levels, T. Chevolleau, T. David, N. Posseme, M. Darnon, F. Bailly, R. Bouyssou, J. Ducote, L. Vallier, O. Joubert, Proceeding of International Symposium on dry process, 2008, (invited contribution) Metallic Versus Organic Hard Mask Strategies for Advanced Dielectric Trenches Patterning, T. Chevolleau, M. Darnon, T. David, D. Perret, J. torres, O. Joubert, Proceeding of International Symposium on dry process, 2007, pp 87-88 Maxime Darnon [email protected] page 5 of 13 A Study of Plasma Treatments Limiting Metal Barrier Diffusion into Porous Low-k Materials, T. David, N. Posseme, T. Chevolleau, M. Darnon, O. Louveau, G. Passemard and O. Joubert, Advanced Metallization Conference Proceedings, 2005, pp. 405-410. - Patents issued by USPTO (5): Interconnect structure fabricated without dry plasma etch processing, M. Darnon, J. P. Gambino, E. E. Huang, Q. Lin, US 8,298,937, Oct 30th, 2012 Method for air gap interconnect integration using photo-patternable low k material, L.A. Clevenger, M. Darnon, Q. Lin, A. D. Lisi, S. V. Nitta, US 8,241,992, Aug. 14th, 2012 Reversing tone of patterns on integrated circuit and nanoscale fabrication, L.A. Clevenger, M. Darnon, A. D. Lisi, S. V. Nitta, US 8,183,694, May 22nd, 2012 Process for reversing tone of patterning on integrated circuit and structural process for nanoscale fabrication, L.A. Clevenger, M. Darnon, A. D. Lisi, S. N. Nitta, US 7,939,446, May 10th, 2011 Forming Interconnects with Air Gaps, S.S. Choi, L.A.Clevenger, M. Darnon, D.C. Edelstein, S.V. Nitta, S. Ponoth, P. Leung, US 7,790,601, Sept 7th, 2010 - Patents application at USPTO (19) Protection of intermetal dielectric layers in multilevel wiring structures, M. Darnon, G. JM. Dubois, S. U. Engelmann, T. P. Magbitang, S. Purushothaman, M. Sankarapandian, W. Volksen, US 20130056874 Method for reversing tone of patterns on integrated circuit and patterning sub-lithography trenches, L.A. Clevenger, M. Darnon, S. V. Nitta, A. D. Lisi, US 20130022930 Interconnect Structure Fabricated Without Dry Plasma Etch Processing, M. Darnon, J. P. Gambino, E. E. Huang, Q. Lin, US 20130009312 Structure and method for Photo-patternable low-k (PPLK) integration, M. Darnon, Q. Lin, US20130001781 Methodology for evaluation of electrical characteristics of carbon nanotubes, M. Darnon, G. W. Gibson, P. P. Joshi, Q. Lin, US20120301980 Method for air gap interconnect integration using photo-patternable low k material, L.A. Clevenger, M. Darnon, Q. Lin, A. D. Lisi, S. V. Nitta, US 20120280398 Method of Patterning of Magnetic Tunnel Junctions, O. Joubert, B. Schwartz, J. G. M. Pereira, K. Menguelti, E. M. Pargon, M. Darnon, US 20120276657 Selective etch back process for carbon nanotubes integration, M. Darnon, G. W. Gibson, P. P. Joshi, R. M. Martin, Y. Zang, US 20110311825 Method for patterning photosensitive material on a substrate containing latent acid generator, M. Darnon, P. P. Joshi, Q. Lin, US 20110311781 Methodology for evaluation of electrical characteristics of carbon nanotubes, M. Darnon, G. W. Gibson, P. P. Joshi, Q. Lin, US 20110309507 Maxime Darnon [email protected] page 6 of 13 Structure and method for air gap interconnect integration, L.A. Clevenger, M. Darnon, Q. Lin, A. D. Lisi, S. V. Nitta, US 20110272810 Structure and method for air gap integration, L.A. Clevenger, M. Darnon, Q. Lin, A. D. Lisi, S. V. Nitta, US 20110260326 Methods for fabrication of an air gap-containing interconnect structure, L.A. Clevenger, M. Darnon, S. V. Nitta, A. D. Lisi, Q. Lin, US 20110221062 Process for reversing tone of patterning on integrated circuit and structural process for nanoscale production, L.A. Clevenger, M. Darnon, A. D. Lisi, S. N. Nitta, US 20110121457 Structure and method for Photo-patternable low-k (PPLK) integration, M. Darnon, Q. Lin, US20110115094 Process for reversing tone of patterning on integrated circuit and structural process for nanoscale fabrication, L.AClevenger, M. Darnon, A. D. Lisi, S. N. Nitta, US 20110108989 Photovoltaic module with a controllable infrared protection layer, L.A. Clevenger, T. J. Dalton, M. Darnon, R. Krausse, G. Pfeiffer, K. Prettyman, C. J. Radens, B. C. Sapp, US 20110100420 Method for reversing tone of patterns on integrated circuit and patterning sub-lithography trenches, L.A. Clevenger, M. Darnon, A.D. Lisi, S.V. Nitta, US 20110020753 Interconnect Structure Fabricated Without Dry Plasma Etch Processing, M. Darnon, J. P. Gambino, E. E. Huang, Q. Lin, US20100314768 - Conferences (65): Pulsed plasmas: from plasma parameters to pattern transfer, M. Darnon, M. Haass, M. Brihoum, G. Cunge, S. Banna and O. Joubert, Plasma Etch and Strip in Microtechnologies conference, Leuven, 2013 Characterization of silicon etching in synchronized pulsed plasma, M. Darnon, M. Haass, G. Cunge, O. Joubert and S. Banna, SPIE-AL, San Jose, CA, 2013 Investigation of synchronized pulsed plasmas for highly selective etching of Si3N4 spacers, R. Blanc, F. Leverd, M. Darnon, S. David, T. David, S. Banna, O. Joubert, Pacific Rim Meeting of the Electrochemical and Solid State Society (PRiME), Hawai, 2012 Time-resolved diagnostics of reactive pulsed plasmas by absorption spectroscopy, modulated beam Mass spectrometry, ion flux probes and RFEA analyzers, G. Cunge, P.Bodart, M.Brihoum, M.Haas, M.Darnon, N.Sadeghi, O.Joubert, N.St. Braithwaite, D.Gahan, S. Banna, First Pulsed Plasma Diagnostics Workshop (PPDW), Dublin, 2012 Analysis of Passivation Layer Composition and Thickness on Silicon Patterns Etched by Synchronously Pulsed Plasmas, M. Haass, M. Darnon, E. Pargon, C. Petit-Etienne, L. Vallier, P. Bodart, G. Cunge, S. Banna, T. Lill and O. Joubert, Plasma Etch and Strip in Microelectronics conference, Grenoble, 2012 Maxime Darnon [email protected] page 7 of 13 Self assembly patterning using block copolymer for advanced CMOS technology T. Chevolleau, G. Cunge, X. Chevalier, R. Tiron, M. Darnon, C. Navarro and S. Magnet, Plasma Etch and Strip in Microelectronics conference, Grenoble, 2012 SiCl4/Cl2 plasmas: a new chemistry to etch high-k material selectively to Si-based Alloys, P. Bodart, G. Cunge, C. Petit-Etienne, M. Darnon, M. Haass, S. Banna, O.Joubert and T.Lill, Plasma Etch and Strip in Microelectronics conference, Grenoble, 2012 Plasmas Processes Challenges for Porous SiCOH Integration in Advanced Interconnects, T. Chevolleau, M. Darnon, N. Posseme, T. David, R. Bouyssou, F. Bailly, J. Ducote, C. Licitra, C. Verove, O. Joubert, Materials Research Society spring meeting, San Francisco, April 2012 (invited contribution) Plasma Etching for Back End Of Line Applications, M. Darnon, T. Chevolleau, T. David, N. Posseme, R. Bouyssou, C. Licitra, N. Rochat, R. Hurand, F. Bailly, C. Verove, O. Joubert China Semiconductor Technology International Conference (CSTIC) 2012, Shanghaï, March 2012 (invited contribution) Towards new plasma technologies for 22nm gate etch processes and beyond, O. Joubert, M. Darnon, G. Cunge, E. Pargon, T. David, C. Petit-Etienne, L. Vallier, N. Posseme, P. Bodart, L. Azarnouche, R. Blanc, M. Haas, M. Brihoum, S. Banna, T. Lill, SPIE-AL, San Jose, CA, 2012 (invited contribution) Self-assembly patterning using block copolymer for advanced CMOS technology: optimisation of plasma etching process, T. Chevolleau, G. Cunge, M. Delalande,, X. Chevalier, R. Tiron, S. David, M. Darnon and C. Navarro, SPIE-AL, San Jose, CA, 2012 Time-resolved diagnostics of pulsed plasmas by UV and VUV absorption spectroscopy and by modulated beam Mass spectrometry, G. Cunge, P. Bodart, M. Brihoum, M. Fouchier, M. Darnon, O. Joubert, S. Banna, N. Sadeghi, 64th Gaseous Electronic Conference, Salt Lake City, November 2011 (invited contribution). Improving Etch Processes by Using Pulsed Plasmas, M. Darnon, M. Haass, P. Bodart, G. Cunge, C. Petit-Etienne, M. Brihoum, R. Blanc, T. David, E. Pargon, L. Vallier, O. Joubert, S. Banna, T. Lill , AVS 58h international symposium, Nashville, October 2011 (invited contribution). Impact of Synchronized Plasma Pulsing Technologies on Key Parameters Governing STI Etch Processes, M. Haass, M. Darnon, G. Cunge, P. Bodart, C. Petit-Etienne, M. Brihoum, L. Vallier, S. Banna, O. Joubert, AVS 58h international symposium, Nashville, October 2011 HfO2 Etching by Pulsed BCl3/Ar Plasma, P. Bodart, C. Petit-Etienne, G. Cunge, F. Boulard, M. Darnon, L. Vallier, E. Pargon, S. Banna, T. Lill, O. Joubert, AVS 58h international symposium, Nashville, October 2011 Characterization of Plasma-Induced Damages on low-k during Interconnection Integration by Scatterometric Porosimetry, R. Hurand, M. Darnon, T. Chevolleau, D. Fuard, F. Bailly, R. Bouyssou, T. David, O. Joubert, F. Leverd, AVS 58h international symposium, Nashville, October 2011 Etch processes with pulsed plasmas for advanced CMOS technologies, M. Darnon, P. Bodart, M. Haass, C. Petit-Etienne, M. Brihoum, G. Cunge, E. Pargon, L. Vallier, T. David, O. Joubert, S. Banna, T. Lill, 3rd International Conference on Microelectronics and Plasma Technology, Dalian, China, July 2011 (invited contribution) Maxime Darnon [email protected] page 8 of 13 Challenges of porous SiCOH dielectric material integration for advanced interconnect technology nodes, M. Darnon, T. Chevolleau, N. Possémé, T. David, O. Joubert, CMOS Emerging Technologies, Canada, Whistler, June 2011 (invited contribution) Scatterometric Porosimetry for porous low-k patterns characterization,R. Hurand, R. Bouyssou, M. Darnon, C. Tiphine, C. Licitra, M. El-kodadi, T. Chevolleau, T. David, N. Posseme, M. Besacier, P. Schiavone, Fanny, Bailly, O. Joubert, C. Verove, joint conference IEEE International Interconnect Technology Conference / Materials for Advanced Metallization, Dresden, May 2011 Impact of ambient atmosphere on plasma-damaged porous low-k characterization, M. Darnon, T. Chevolleau, T. David, N. Posseme, R. Bouyssou, R. Hurand, O. Joubert, C. Licitra, N. Rochat, F. Bailly, C. Verove, joint conference IEEE International Interconnect Technology Conference / Materials for Advanced Metallization, Dresden, May 2011 Time-Modulation of High density Plasmas for Advanced Dry Etching Processes, S. Banna, A. Agarwal, T. Lill, M. Darnon, G. Cunge, E. Pargon, O. Joubert, 4th Plasma Etch and Strip in Microelectronics Workshop, Mechelen, May 2011 (invited contribution) Characterizing plasma-damaged porous low-k, M. Darnon, T. Chevolleau, T. David, N. Posseme, R. Bouyssou, R. Hurand, C. Tiphine, M. El-kodadi, M. Besacier, P. Schiavone, O. Joubert, C. Licitra, N. Rochat, F. Bailly, C. Verove, 4th Plasma Etch and Strip in Microelectronics Workshop, Mechelen, May 2011 HfO2 etching by pulsed BCl3/Ar plasma, P. Bodart, C. Petit-Etienne, G. Cunge, F. Boulard, L. Vallier, M. Darnon, E. Pargon, S. Banna, T. Lill, O. Joubert, 4th Plasma Etch and Strip in Microelectronics Workshop, Mechelen, May 2011 Low k Integration Using Metallic Hard Masks, O. Joubert, N. Possémé, T. David, T. Chevolleau, M. Darnon, Materials Research Society spring meeting (MRS) 2011, San Francisco, May 2011 (invited contribution) Interest of synchronized pulsed plasmas for next CMOS technologies, O. Joubert, M. Darnon, G. Cunge, E. Pargon, L. Vallier, N. Sadeghi, T. David, M. Haass, P. Bodart, C. Petit-Etienne, S. Banna, T. Lill, China Semiconductor Technology International Conference (CSTIC) 2011, Shanghaï, March 2011 (invited keynote) Porous SiOCH integration: Etch challenges with a trench first metal hard mask approach, N. Possémé, T. David, T. Chevolleau, M. Darnon, Ph. Brun, M. Guillermet, J.P. Oddou, S. Barnola, F. Bailly, R. Bouyssou, J. Ducote, R. Hurand, C. Vérove and O. Joubert, China Semiconductor Technology International Conference (CSTIC) 2011, Shanghaï, March 2011 (SEMI Best Young Engineer Award) Angstrom Level Resolution Etch, T. Lill, O. Joubert, M. Darnon, S. Banna, A. Agarwal, China Semiconductor Technology International Conference (CSTIC) 2011, Shanghaï, March 2011 (invited contribution) Characterizing Plasma Induced Damage to Ultra Low-k, M. Darnon, T. Chevolleau, T. David, N. Posseme, R. Bouyssou, C. Licitra, N. Rochat, M. El kodadi, R. Hurand, F. Bailly, C. Verove, O. Joubert, China Semiconductor Technology International Conference (CSTIC) 2011, Shanghaï, March 2011 Porous SiCOH Patterning for Advanced Interconnects: Challenges and Solutions, N. Posseme, T. David, T. Chevolleau, M. Darnon, F. Bailly, R. Bouyssou, J. Ducote, Maxime Darnon [email protected] page 9 of 13 C. Verove, O. Joubert, Electrochem. 219th Soc. Meeting, Montreal, May 2011(invited contribution) Development of Porosimetry Techniques for the Characterization of Plasma-Treated Porous Ultra Low-K Materials, C. Licitra, T. Chevolleau, R. Bouyssou, M. El Kodadi, G. Haberfehlner, J. Hazart, L. Virot, M. Besacier, N. Posseme, M. Darnon, R. Hurand, P. Schiavone, F. Bertin, Electrochem. 219th Soc. Meeting, Montreal, May 2011(invited contribution) Pulsed plasmas for nanoCMOS and nanoelectronics devices elaboration, E. Pargon, G. Cunge, M. Darnon, L.Vallier, P. Bodart, C. Petit-Etienne, M. Haass, O. Luere, M. Brihoum, T. David, T.Chevolleau, O. Joubert, 2nd International Conference on Plasma Nanoscience (iPlasma Nano-II), Bateman’s Bay, Australia, December 2010. Pulsed plasmas for nanoCMOS and nanoelectronics devices elaboration, E. Pargon, G. Cunge, M. Darnon, L. Vallier, P. Bodart, C. Petit-Etienne, M. Haass, O. Luere, M. Brihoum, T. David, T. Chevolleau, O. Joubert, iPlasmaNanoII, December 12th-15th, (invited contribution) Plasma Processes Challenges for Porous SiOCH Patterning in Advanced Interconnects, N. Posseme, T. Chevolleau, T. David, M. Darnon, F. Bailly, R. Bouyssou, J. Ducote, C. Verove, AVS 57th international symposium, Albuquerque, October 2010 (invited contribution). Reduction of Plasma Induced Silicon-Recess During Gate Over-Etch Using Synchronous Pulsed Plasmas, M. Darnon, C. Petit-Etienne, F. Boullard, E. Pargon, L. Vallier, G. Cunge, P. Bodart, M. Haass, S. Banna, T. Lill, O. Joubert, AVS 57th international symposium, Albuquerque, October 2010. Synchronous Plasma Pulsing For Etch Applications, M. Haass, M. Darnon, E. Pargon, C. Petit-Etienne, L. Vallier, P. Bodart, G. Cunge, S. Banna, T. Lill, O. Joubert, AVS 57th international symposium, Albuquerque, October 2010 (Coburn and Winters Student Award Finalist). Challenges in sub-100 nm Dual Damascene Etch of Porous Oxycarbosilane Ultra Low-k Dielectrics for BEOL Integration, S. U. Engelmann, S. Purushothaman, T. J. Frot, M. Darnon, M. Lofaro, S. Cohen, W. Volksen, T. P. Magbitang, L. Krupp, G. Dubois, AVS 57th international symposium, Albuquerque, October 2010. Synchronized pulsed plasmas: potential process improvements for patterning technologies, O. Joubert, G. Cunge , M.Darnon, E. Pargon, T. David, L. Vallier, N. Sadeghi, M. Haass, F. Boulard, P. Bodart, C. Petit Etienne, S. Banna, T. Lill, 63rd Gaseous Electronic Conference and 7th International Conference on Reactive Plasmas, Paris, October 2010 (invited contribution). Synchronous Plasma Pulsing for Etch Applications, M. Haass, M. Darnon, E. Pargon, S. Banna, O. Joubert, 63rd Gaseous Electronic Conference and 7th International Conference on Reactive Plasmas, Paris, October 2010. Etching Process Scalability and Challenges for ULK Materials, T. Chevolleau, N. Posseme, T. David, R. Bouyssou, J. Ducote, F. Bailly, M. Darnon, M. El Kodadi, M. Besacier, C. Licitra, C.Verove, O. Joubert, IEEE International Interconnect Technology Conference, San Francisco, June 2010 (Invited Contribution). Maxime Darnon [email protected] page 10 of 13 Molecularly Reinforced Sol-gel Glasses: Preparation, Characterization and Integration Studies, W. Volksen, G. Dubois, T. Magbitang, V. Lee, R. D. Miller, J. P. Doyle, N. Fuller, S. U. Engelmann, M. Darnon, M. Lofaro, S. A. Cohen, S. Purushothaman, H. Nakagawa, Y. Nobe, T. Kokubo, Material Research Society Spring Meeting, April 2010 Challenges and future prospects in plasma etching processes, O.Joubert, E. Pargon, G. Cunge, M. Darnon, L. Vallier, T. Chevolleau, T. David, L. Azarnouche, M. Haass, P. Bodart, R. Ramos, C. Petit-Etienne, O. Luere, F. Boulard, T. Lill, S. Banna, 3rd International Conference on PLAsma NanoTechnology and Science, Nagoya, March 2010 (invited contribution) Synchronous Plasma Pulsing for Etch Applications, M. Darnon, C. Petit-Etienne, E. Pargon, G. Cunge, L. Vallier, P. Bodart, M. Haas, O. Joubert, China Semiconductor Technology International Conference (CSTIC) 2010, Shanghaï, March 2010 (SEMI Best Young Engineer Award) Sidewall Modification of Porous SiOCH Induced by Etching and Post Etching Plasma Treatments, R. Bouyssou, T. Chevolleau, M. El-Kodadi, M. Besacier, N. Possémé, R. Hurand, T. David, C. Licitra, M. Darnon, C. Vérove, O. Joubert, 3rd Plasma Etch and Strip in Microelectronics Workshop, Grenoble, March 2010 (best poster award) Plasma Pulsing for Atomic Layer Etching Application, P. Bodart, C. Petit-Etienne, G. Cunge, L. Vallier, M. Darnon, M. Haass, E. Pargon, S. Banna, T. Lill, O. Joubert, 3rd Plasma Etch and Strip in Microelectronics Workshop, Grenoble, March 2010 Synchronous Plasma Pulsing for Etch Applications, M. Haass, M. Darnon, E. Pargon, C. Petit-Etienne, L. Vallier, P. Bodart, G. Cunge, S. Banna, T. Lill, O. Joubert, 3rd Plasma Etch and Strip in Microelectronics Workshop, Grenoble, March 2010 (best student paper award) Inductively-Coupled Pulsed Plasmas in the Presence of Synchronous Pulsed Substrate Bias for Advanced Gate Etching, S. Banna, A. Agarwal, V. Todorow, S. Rauf, K. Ramaswamy, P. Stout, D. Lymberopoulos, K. Collins, K. Tokashiki, J-Y. Lee, J. Yoon, K. Shin, O. Joubert, G. Cunge, E. Pargon, L. Vallier, M. Darnon, C. Petit-Etienne, AVS 56th international symposium, November 2009, (invited contribution). Trigate 6T SRAM scaling to 0.06 μm2, M. Guillorn, J. Chang, A. Pyzyna, S. U. Engelmann, E. Joseph, B. Fletcher, C. Cabral Jr., C.-H. Lin, A. Bryant, M. Darnon, J. Ott, C. Lavoie, M. Frank, L. Gignac, J. Newbury, C. Wang, D. Klaus, E. Kratschmer, J. Bucchignano, B. N. To, W. Graham, I. Lauer, E. Sikorski, S. Carter, V. Narayanan, N. Fuller, Y. Zhang, W. Haensch, 2009 International Electron Devices Meeting, IEDM 2009, December 2009. Hydrogen Silsesquioxane-Based Hybrid Electron Beam And Optical Lithography For High Density CMOS Prototyping, M. Guillorn, J. Chang, N. Fuller, J. Patel, J. Ott, J. Newbury, M. Darnon, A. Pyzyna, E. Joseph, S. Engellmann, D. Klaus, JU. Bucchignano, E. Kratschmer, W. Graham, B. To, Y. Zhang, R. Viswanathan and W. Haensch, 53rd Iinternational Conference on Electron, Ion, and Photon Beam Technology & Nanoffabrication, May 2009. Plasma Challenges of Porous SiOCH Patterning for Advanced Interconnect Levels, T. Chevolleau, T. David, N. Posseme, M. Darnon, F. Bailly, R. Bouyssou, J. Ducote, L. Vallier, O. Joubert, AVS 55th international symposium, October 2008, (invited contribution). Maxime Darnon [email protected] page 11 of 13 Deposition and Etching of Hexagonal and Cubic Boron Nitride, M. Darnon, D. Neumayer, G. Gibson, Y. Zhang, AVS 55th international symposium, October 2008. Ash Plasma Exposure of Hybrid Material (SiOCH and porogen): Comparisaon with Porous SiOCH, M. Darnon, T. Chevolleau, T.David, L. Vallier, J. Torres, O. Joubert, AVS 54th international symposium, November 2007. Chamber Walls Coatings during hard mask patterning of Ultra Low-k Materials: Consequences on Cleaning Strategies, T. Chevolleau, M. Darnon, T. David, N. Posseme, J. torres, O. Joubert, AVS 54th international symposium, November 2007 Porous SiOCH modification by O2, NH3 and CH4 plasmas used as ashing and pore sealing steps, M. Darnon, T. Chevolleau, N. Posseme, T. David, C. Licitra, J. Torres, O. Joubert, Plasma Etch and Strip in Microelectronics Workshop, September 2007 Chamber walls coating during patterning of dielectric damascene structures with a metal hard mask: consequence on cleaning strategies, T. Chevolleau, M. Darnon, T. David, N. Posseme, O. Joubert, Plasma Etch and Strip in Microelectronics Workshop, September 2007. Comprehensive study of metal-fluoride crystals issues with trench first hard mask back end architecture, A. Lagha, L. Broussous, D. Pepper, C. Maurice, N. Cabuil, A. Le Gouil, C. Trouiller, A. Margain, R. Pantel, M. Darnon, C. Levy, Surface Preparation and Cleaning Conference, April 2007 Dielectric Trenches Patterning: Metallic Vs Organic Hard Mask, M. Darnon, T. Chevolleau, T. David, D. Perret, J. Torres, O. Joubert, Materials for Advanced Metallization, March 2007. Profile Control and Sidewall Modifications of Narrow Porous ULK Trenches after Plasma Etching and Pore Sealing Treatments, M. Darnon, T. Chevolleau, D. Eon, F. Bailly, L. Vallier, J. Torres and O. Joubert, AVS 53rd international symposium, November 2006. Patterning of Narrow SiOCH Trenches using the Late Porogen Removal Process, T. Chevolleau, D. Eon, M. Darnon, T. David, L. Vallier and O. Joubert, AVS 53rd international symposium, November 2006. Material Modifications and Surface Roughness during Porous SiOCH Etching Processes, F. Bailly, T. David, A. Jacquier, M. Darnon and C. Cardinaud, AVS 53rd international symposium, November 2006. Critical Dimensions Control of Narrow Low-k Trenches, M. Darnon, T. Chevolleau, N. Posseme, T. David, L. Vallier, J. Torres and O. Joubert, Materials for Advanced Metallization, March 2006. Challenges of Plasma Processes for Advanced ULK Patterning, L. Vallier, T. Chevolleau, O. Joubert, M. Darnon, D. Eon, N. Posseme, T. David, Materials for Advanced Metallization, March 2006, (invited contribution). Etching of Narrow Porous SiOCH Trenches Using a TiN Metallic Hard Mask, M. Darnon, N. Posseme, D. Eon, T. David, T. Chevolleau, L. Vallier and O. Joubert, AVS 52nd international symposium, November 2005. Etching Mechanisms of Low-k Materials with the Solid FirstTM ILD Process in Fluorocarbon Based Plasma, T. Chevolleau, D. Eon, M. Darnon, L. Vallier and O. Joubert, AVS 52nd international symposium, November 2005. Maxime Darnon [email protected] page 12 of 13 Impact of Hard Mask Composition and Etching Chemistry on Porous Ultra Low-k Material Modification, N. Posseme, T. David, M. Darnon, T. Chevolleau and O. Joubert, 6th International Conference on Microelectronics and Interfaces, 2005. Comparison Between Metallic and Inorganic Hard Masks Used for Advanced Porous Low-k Patterning, M. Darnon, T. Chevolleau, N. Posseme, T. David, L. Vallier, J. Torres, O. Joubert, 15th International Colloquium on Plasma Processes, June 2005. - Miscellaneous (2): Advanced Techniques for the Characterizaion of Damaged ULK, M. Darnon, T. Chevolleau, T. David, N. Posseme, Future Fab International, 38, July 2011 Porous SiOCH Integration: Etch Challenges With a Metallic Hard Mask Approach, T. David, N. Posseme, M. Darnon, T. Chevolleau, Future Fab International, 37, March 2011 Maxime Darnon [email protected] page 13 of 13