hardware documentation

Transcription

PowerPC 750-based VMEbus Board
hardware documentation
Revision 1B
Revision
Revision
Changes
Date / Name
0A
First Edition
05.11..03 GM/UW
0B
Second Edition
09.12..03 rae
0C
Table 1.16 correct
24.05.04 GM
0D
Small fixes
02.12.04 GM
1A
Small fixes
22.03.06 GM / GOT
1B
Disclaimer new
08.11.06 hh
DISCLAIMER
Copyright
© 2006 ELTEC Elektronik AG. The information, data, and figures in this document including respective references have
been verified and found to be legitimate. In particular in the event of error they may, therefore, be changed at any time
without prior notice. The complete risk inherent in the utilization of this document or in the results of its utilization
shall be with the user; to this end, ELTEC Elektronik AG shall not accept any liability. Regardless of the applicability of
respective copyrights, no portion of this document shall be copied, forwarded or stored in a data reception system or
entered into such systems without the express prior written consent of ELTEC Elektronik AG, regardless of how such acts
are performed and what system is used (electronic, mechanic, photocopying, recording, etc.). All product and company
names are registered trademarks of the respective companies.
Our General Business, Delivery, Offer, and Payment Terms and Conditions shall otherwise apply.
Federal communications commission statement
Þ
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Þ
This device complies with FCC Rules Part 15. Operation is subject to the following two conditions:
This device may not cause harmful interference, and
This device must accept any interference received including interference that may cause undesired operation.
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15
of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a
residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed
and used in accordance with manufacturer’s instructions, may cause harmful interference to radio communications.
However, there is no guarantee that interference will not occur in a particular installation. If this equipment does
cause harmful interference to radio or television reception, which can be determined by turning the equipment off
and on, the user is encouraged to try correct the interference by one or more of the following measures:
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment to an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
The us of shielded cables for connection of the monitor to the graphics card is required to assure compliance with
FCC regulations. Changes or modifications to this unit not expressly approved by the party responsible for
compliance could void the user’s authority to operate this equipment.
Canadian department of communications statement
Þ This digital apparatus does not exceed the Class B limits for radio noise emissions from digital apparatus set out in
the Radio Interference Regulations of the Canadian Department of Communications.
Þ This class B digital apparatus complies with Canadian ICES-003
SAFETY INFORMATION
Electrical safety
Þ To prevent electrical shock hazard, disconnect the power cable from the electrical outlet before reloading the
system.
Þ When adding or removing devices to or from the system, ensure that the power cables for the devices are
unplugged before the signal cables are connected. If possible, disconnect all power cables from the existing system
before you add device.
Þ Before connecting or removing signals cables from motherboard, ensure that all power cables are unplugged.
Þ Make sure that your power supply is set to the correct voltage in your area. If you are not sure about the voltage of
the electrical outlet you are using, contact your local power company.
Þ If the power supply is broken, do not try to fix it by yourself. Contact a qualified service technician or your retailer.
Operation safety
Þ Before installing the motherboard and adding devices on it, carefully read the manuals that came with the
package.
Þ Before using the product, make sure all cables are correctly connected and the power cables are not damaged. If
you detect any damage, contact your dealer immediately.
Þ To avoid short circuits, keep paper clips, screws, and staples away from connectors, slots sockets and circuitry.
Þ Avoid dust, humidity, and temperature extremes. Do not place the product in any area where it may become wet.
Þ Place the product on a stable surface.
Þ If you encounter technical problems with the product, contact a qualified service technician or your retailer.
EMC Rules
This unit has to be installed in a shielded housing. If not installed in a properly shielded enclosure, and used in
accordance with the instruction manual, this product may cause radio interference in which case the user may be
required to take adequate measures at his or her own expense.
IMPROTANT INFORMATION
This product is not an end user product. It was developed and manufactured for further processing by trained personnel.
RECYCLING
Please recycle packaging environmentally friendly:
Packaging materials are recyclable. Please do not dispose packaging into domestic waste but recycle it.
Please recycle old or redundant devices environmentally friendly:
Old devices contain valuable recyclable materials that should be reutilized. Therefore please dispose
.... old devices at collection points which are suitable.
Table of Contents
Disclaimer / Copyright notice
About this document
1. Hardware part
1.1. Specification
1.1.1. Main Features
1.1.2. Specification Details
1.2. Installation
1.2.1. BAB 760 I/O
1.3. Connector Assignments
1.3.1. On-board Connectors
1.3.2. ADAP-760 Connectors
1.3.3. PMCE-740 Connectors
1.4. Board Parameters
1.4.1. Host Bus
1.4.2. VMEbus
1.4.3. PCI Local Bus
1.4.4. Network
1.4.5. EIDE
1.4.6. Serial I/O
1.4.7. Keyboard
1.4.8. Mouse
1.4.9. Parallel I/O
1.4.10. MTBF Values
1.4.11. ESD Values
1.4.12. Environmental Conditions
1.4.13. Maximum Operating Humidity:
1.4.14. Power Requirements
1.4.15. Battery
1.5. Jumpers
1.5.1. On-board Jumpers
1.5.2. PMCE-740 Jumpers
1.5.3. ADAP-760 Jumpers
2. LINUX part
2.1. Prepare your developement system
2.1.1. Serial terminal program
2.1.2. Bootp server
2.1.3. ELinOS Installation
2.1.4. Installation of BAB760 kernel sources
2.1.5. BAB760 sample projects
2.1.6. Downloading and running the sample project
2.2. U-Boot
2.3. Using ELinOS demonstration projects
2.3.1. Cloning a project
2.4. VMEbus Driver
2.4.1. Foreword
2.4.2. Features
2.4.3. A few policy issues
2.4.4. Configuring your kernel
2.4.5. Driver loading and chip initialisation
2.4.6. Accessing the VME bus from application programs
2.4.7. Access to VME from kernel mode (writing board specific drivers)
2.4.8. Caveats
2.4.9. Remaining problems
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BAB 760
2.4.10. Unsupported Universe features
3. OS-9 part
3.1. OS9, Installing and Configuring the BSP
3.1.1. Hardware and Software Requirements
3.1.2. First Steps
3.1.3. Building a ROM Image
3.2. Booting OS-9
3.2.1. stage 1
3.2.2. stage 2
3.3. Board Specific Reference
3.3.1. The Boot Menu
3.4. Board Specific Modules
3.4.1. Low-Level System Modules
3.4.2. High-Level System Module
3.5. additional modules from Eltec
3.5.1. non volatile information
3.6. Setup the Non Volatile Informationssetup
3.6.1. The Main Menu
3.6.2. The submenus
3.6.3. Boot parameters
3.6.4. select the boot device
3.6.5. select the autoboot delay for eltec
3.7. select the boot flags
3.7.1. start rombug before coreboot menu
3.7.2. enable the autoboot
3.7.3. enabling the watchdog
3.7.4. direct boot depend entries This bootdevice needs no further parameters
3.7.5. ethernet depend entries
3.7.6. enableWatchdog
3.8. Structure of the non volatile System Information
3.8.1. The Main Structure
3.8.2. OS-9 Specific Informations
3.8.3. Content of the Revision EEPROM
3.8.4. - network (80 bytes)
A. Appendix
A.1. Description of On-board Devices
A.2. PCI IDSEL and Interrupt Routing
A.3. Interrupts
A.4. PLD Register
A.5. Initialization/User LED
A.6. GPIO Use
A.6.1. GPIO Use
A.7. Timer Extension AC Specification
A.8. Known Problems
A.8.1. I2C Deadlock
A.8.2. PCI Ordering
A.8.3. Mixed EIDE/SATA Operation
A.8.4. Caching of the FLASH EPROM
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List of Tables
1.1. Activity LEDs
1.2. Ethernet Status LEDs
1.3. Keyboard/MOUSE (6-pin miniature circular connector)
1.4. Ethernet Connector
1.5. Serial Ports 1 and 2 Connectors
1.6. VMEbus Connector P1 (X1602)
1.7. VMEbus Connector P2 (X1601)
1.8. Pinout EIDE Connector X105 (on ADAP-760)
1.9. COM3 and COM4 Connectors X103 and X104 (on ADAP-760)
1.10. Printer / Timer Connector X102 (on ADAP-760)
1.11. SATA Master
1.12. SATA Slave
1.13. PMCE-740 VMEbus Connector P1 (X402)
1.14. PMCE-740 PCI Mezzanine Card Connectors Jn11, Jn12 (X101, X102).
1.15. PMCE-740 PCI Mezzanine Card Connectors Jn21, Jn22 (X201, X202).
1.16. PCI Mezzanine Card Back Plane I/O Routing.
1.17. PMCE-740 Power Connector
1.18. Boot ROM Select (J1001)
1.19. VMEbus SYSRESET (J1401, J1502)
1.20. VMEbus SYSFAIL (J1501)
1.21. COM3 and COM4 DSR Support (J1601)
1.22. PMC Slot 1 PCIREQ and PCIGNT Routing
1.23. PMC Slot 1 Interrupt Routing
1.24. ADAP-760 EIDE / SATA Recommeded Configurations
2.1. Common PPCBoot commands
2.2. Standard PPCBoot environment
2.3. Extented PPCBoot environment (ELTEC)
2.4. BAB760 Flash ROM mapping
2.5. [VME address modifier names]VME address modifier names, they are all followed by the
desired data width between parentheses.tbl:am
3.1. values to choice the Vsize of the VME window
3.2. Supported Boot Methods
3.3. Configuration Modiules
3.4. Console Drivers
3.5. Debugging Modules
3.6. Ethernet Driver
3.7. System Modules
3.8. Timer Modules
3.9. Ticker
3.10. Shared Libraries
3.11. Serial and Console Drivers
3.12. Ethernet Driver
3.13. Common System Modules
3.14. available sources
3.15. Structure of the non volatile informationSystemInformation.MainStructure
3.16. As described above, the OS-9 specific area contains the following informations:
3.17. network (80 bytes)
3.18. I/O Settings
3.19. serial controllers (4x8 bytes)
3.20. parallel port
3.21. network controllers (2x bytes)
3.22. common
3.23. VME Settings
3.24. Miscellaneous Parameters
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3.25. Miscellaneous Parameters
3.26. - internal parameters (8 bytes)
3.27. - network (80 bytes)
A.1. BAB-760 CPU Addressmap
A.3. Interrupts
A.4. PLD Addressmap:
A.5. Timer 0-2 Extension Register Layout:
A.6. LPT Interrupt Control Register Layout:
A.7. Flash Write Protect Register Layout:
A.8. GPIO Usage
A.9. VMEbus Window Size
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About this document
This document describes the ELTEC BAB760 running under LINUX or OS-9.
The BAB760 is a PowerPC based VMEbus board for use in a passive backplane.
Chapter 1 describes the hardware of the BAB760 in detail.
Chapter 2.1 describes how to prepare your development system for ELINOS cross development. It
explains the first steps needed to compile and start the sample project available.
Chapter 2.2 describes the bootloader U-Boot and its configuration.
Chapter 2.3 shows how to clone ELinOS sample projects and use them with the BAB760.
Chapter 3 describes how to run the BAB760 with OS-9.
ii
Chapter 1. Hardware part
1.1. Specification
1.1.1. Main Features
•
PowerPC-based VMEbus CPU board
•
PowerPC 750 FX (600 - 800 MHz, 750 GX with 800 - 1200 MHz)
•
512 kB on-chip second level cache, 1 MB with 750 GX
•
128 MB to 1 GB SDRAM
•
Serial ATA hard disk interface on transition board, on-board parallel IDE interface
•
Dual 10 / 100 Mb Ethernet interface (10 BaseT /100BaseTX)
•
32-bit VMEbus interface
•
Four serial and one bi-directional parallel channels
•
Double Eurocard (6U), single-slot format
•
Single-slot PMC module with 64-bit/66 MHz bus mountable on-board
•
Transition board for I/O connectivity via VMEbus backplane.
•
VxWorks, Linux, OS-9 BSP support
1.1.2. Specification Details
The BAB 760 is a PowerPC-based single board computer with a VMEbus interface. The standardized
Eurocard format permits setting up multiprocessor systems in proven 19" racks.
The board is based on the Marvell Discovery 1 chip set, providing internal 64-bit/ 66 MHz PCI resources.
Also, long-term availability, compared to the PC market, makes the board an ideal platform for industrial
applications.
1.1.2.1. CPU
The latest PowerPC CPUs are supported: IBM's PowerPC 750 FX, compatible to the PowerPC 750 (G3
kernel) at 600 MHz to 800 MHz. The CPU has FPU, MMU, first level cache and a L2 cache. The
next-generation PowerPC 750 GX will also fit on the BAB 760.
1.1.2.2. Memory Configuration
The 64-bit wide memory allows configurations of 128 MBytes, 256 Mbytes, or 512 MBytes with on-board
133 MHz SDRAMs in a single SO-DIMM module; 1GB modules are supported when available. The
second-level cache, located on the CPU chip, runs with the full CPU clock rate.
A CompactFlash socket, mounted on the board, offers file storage with robust, non-rotating media.
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1.1.2.3. Boot PROM
Boot code is stored in a Flash EPROM which enables easy code updates. Boot from IDE or Ethernet is
supported, depending on the operating system used.
A second Flash device with 8 MB is available for user-supplied code.
Current boot Proms contain self test code as well as OS boot code for Linux, OS-9, and VxWorks.
1.1.2.4. Hard Disks
Hard Disks are supported with the parallel ATA controller of the BAB 760. Data is transferred with up to
100 MB/s. There are two ATA channels, one of which is used for attaching the Compact Flash socket.
The second IDE channel is routed to the transition board on the backplane, where data is converted to
serial ATA format.
1.1.2.5. Ethernet Interface
The two network interfaces use the chipset-internal network controllers for 10/100 Mbps transfers with
10BaseT (twisted pair) or 100Base TX connectivity. Both Ethernet ports are routed to the front panel.
1.1.2.6. I/O Features
Four asynchronous 16550-compatible serial channels with up to 115 kbaud transfer rate and 16-byte
FIFO with RS232 levels are available. PS/2-compatible keyboard and mouse interfaces are provided with
a single mini-DIN connector (for use with Y cable). A printer port is routed to the backplane transition
board (optional).
1.1.2.7. VMEbus Interface
The VMEbus interface is implemented with a 32-bit PCI-to-VME interface chip, delivering system slot
capabilities for 32-bit VME systems. It features four programmable address windows, programmable VME
interrupt handling, and interrupt generation, as well as DMA functionality. Software drivers for all
operating systems supported on the BAB 760 are supplied.
1.1.2.8. Watchdog / Timers
The BAB 760 has three on-board 32-bit counters with programmable time-out periods, each with gating
input and timer output; they can be used as a watchdogs, process timers, etc. Special-function counters,
such as angular encoders, can be implemented in an on-board programmable circuit on request.
1.1.2.9. Operating Systems
The software support for the BAB 760 includes support for Embedded Linux and OS-9. A board support
package for WindRiver's VxWorks (rev 5.5) with Tornado (rev 2.2) is in preparation.
1.1.2.10. PMC Expansion
A PMC single-slot module board can be installed in the on-board PMC connector. Additionally, a PMC
module carrier board can be installed to provide two additional PMC module slots. PMC I/O of the carrier
is routed to the backplane P2 connectors.
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1.1.2.11. Dual PMC Option
As an option, the BAB 760 can be equipped with two PMC slots instead of one, while still fitting into a
single VME slot. Due to limited front panel space, with this option the following changes apply:
Keyboard/mouse and CompactFlASH connectors are not supplied. In addition, only one serial RS-232 D
and one ethernet connector is at the front panel and the PMC expansion carrier cannot be used.
1.1.2.12. Front Panel I/O
There are two options for the front panel, depending on the selection of one or two PMC modules: The
single-PMC version has two serial-interface Sub D connectors, two Ethernet RJ-45 connectors and one
keyboard-mouse mini-DIN connector and PMC mounting slot.. The dual-PMC option has one 9-pin serial
D connector and one Ethernet RJ45 connector.
1.1.2.13. Transition Board
The transition board is used to route I/O from the backside of the backplane to the enclosure back panel.
It contains standard connectors for COM3/4, and header connectors for serial ATA as well as for parallel
ATA. Conversion from parallel to serial ATA is also done on the transition board. Parallel port and timer
I/Os are available only alternatively.
1.1.2.14. Miscellaneous
USB is not implemented on the BAB 760 board. However, a PMC module with USB 2.0 support and two
connectors will be available.
For applications requiring SCSI, an expansion board occupying the adjacent VME slot is in preparation.
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1.1.2.15. Block Diagram
Block Diagram BAB 760
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1.2. Installation
1.2.1. BAB 760 I/O
1.2.1.1. VMEbus Installation
WARNING: Due to the power dissipation of the MPC760 CPU it is not recommended to operate the
BAB 760 without forced air cooling. The 750GX CPU has a even higher power dissipation so that boards
with 933 MHz or more must be operated with forced air cooling.
The BAB 760 needs two VMEbus slots, when used with the PMCE carrier board. Since the two boards
(BAB 760 and PMCE) have an internal connection, be sure to install respectively remove the two-board
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package carefully and simultaneously!
1.2.1.2. What's needed for Installation
The BAB 760 must be installed into a 32-bit VMEbus rack. A terminal (or a PC with a terminal emulator
program), set to 9600 baud, 8 bit, no parity, is needed to check boot messages and to change boot
settings. A IDE hard disk must be attached via an ADAP-760 if the operating system is booted from disk;
if it is booted from Ethernet, this network connection is needed.
1.2.1.3. SODIMM Installation
All 144-pin PC133 SO-DIMMs up to 512 MByte and some 1 Gbyte SO-DIMMs can be used with the BAB
760. The firmware reads the type and size of the SO-DIMM from the SPD (Serial Presence Detect)
EEPROM installed on the memory module. However there are some restrictions and recommendations:
•
SDRAMs should be 133 MHz or faster.
•
Modules with CAS latency 2 are recommended.
After reset the firmware tests the memory modules. If the test fails or the firmware reports the wrong size
the module may not be suitable for the BAB 760.
1.2.1.4. Activity LEDs
There are two activity LEDs on the front panel of the BAB 760. The LEDs have a pulse stretcher to make
short pulses visible.
Table 1.1. Activity LEDs
LED
Color
Description
RUN
Green
CPU data bus in usage
RUN
Yellow
Initialization/User LED (see
"A.5 Initialization/User LED"
DISK
Yellow
access to IDE bus disk
DISK
Green
access to CompactFLASH
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1.2.1.5. Ethernet Status LEDs
At the ethernet connector there are two LEDs indicating link status and network activity.
Table 1.2. Ethernet Status LEDs
LED
Color
Description
Activity
Yellow
Activity
off
Link
Green
100 Mbit/s link pulses detected
Link
Yellow
10 Mbit/s link pulses detected
Link
off
Network activity
no Network activity
no link pulses detected
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1.3. Connector Assignments
Please check the connector assignments before making any connections!
1.3.1. On-board Connectors
1.3.1.1. Keyboard/MOUSE (6-pin miniature circular connector)
Table 1.3. Keyboard/MOUSE (6-pin miniature circular connector)
Pin
Signal
1
/KBDAT
2
/MSDAT
3
GND
4
5V
5
/KBCLK
6
/MSCLK
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1.3.1.2. Ethernet Connector
Table 1.4. Ethernet Connector
Pin
Signal
1
TXD+
2
TXD-
3
RXD+
4
nc
5
nc
6
RXD-
7
nc
8
nc
1.3.1.3. Serial Ports 1 and 2 Connectors
Table 1.5. Serial Ports 1 and 2 Connectors
Pin
Signal
1
DCD
2
RXD
3
TXD
4
DTR
5
GND
6
DSR
7
RTS
8
CTS
9
RI
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1.3.1.4. VMEbus Connector P1
Table 1.6. VMEbus Connector P1 (X1602)
Pin
Row A
Row B
Row C
1 D00
/BBSY
D08
2 D01
/BCLR
D09
3 D02
/ACFAIL
D10
4 D03
/BG0IN
D11
5 D04
/BG0OUT
D12
6 D05
/BG1IN
D13
7 D06
/BG1OUT
D14
8 D07
BG2IN
D15
9 GND
/BG2OUT
GND
10 SYSCLK
BG3IN
/SYSFAIL
11 GND
/BG3OUT
/BERR
12 /DS1
/BR0
/SYSRESET
13 /DS0
/BR1
/LWORD
14 /WRITE
/BR2
AM5
15 GND
/BR3
A23
16 /DTACK
AM0
A22
17 GND
AM1
A21
18 /AS
AM2
A20
19 GND
AM3
A19
20 /IACK
GND
A18
21 /IACKIN
(SERCLK)
A17
22 /IACKOUT
(SERDAT)
A16
23 AM4
GND
A15
24 A07
/IRQ7
A14
25 A06
/IRQ6
A13
26 A05
/IRQ5
A12
27 A04
/IRQ4
A11
28 A03
/IRQ3
A10
29 A02
/IRQ2
A09
30 A01
/IRQ1
A08
31 -12V
+5STDBY
+12V
32 +5V
+5V
+5V
Signals in parentheses are not connected
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Table 1.7. VMEbus Connector P2 (X1601)
Pin
Row A
Row B
Row C
1 IDECBLID
+5V
IDEDD(1)
2 IDEDD(0)
GND
IDEDD(3)
3 IDEDD(2)
Reserved
IDEDD(5)
4 IDEDD(4)
A24
IDEDD(7)
5 IDEDD(6)
A25
IDEDD(8)
6 IDEIORDY
A26
IDEDD(9)
7 IDEDA(0)
A27
IDEDD(10)
8 IDEDA(1)
A28
IDEDD(11)
9 IDEDA(2)
A29
IDEDD(12)
10 IDEDD(13)
A30
LPTSTB
11 LPTPD(0)
A31
LPTPD(1)
12 LPTPD(2)
GND
LPTPD(3)
13 LPTPD(4)
+5V
LPTPD(5)
14 LPTPD(6)
D16
LPTPD(7)
15 LPTACK
D17
IDEDCS(1)
16 LPTBUSY
D18
IDEDD(14)
17 IDEDD(15)
D19
IDEACT
18 IDEDDACK
D20
IDERST
19 IDEIRQ
D21
IDEDCS(0)
20 IDEDIOW
D22
IDEDREQ
21 IDEDIOR
D23
COM4DSR
22 COM4RI
GND
COM4DTR
23 COM4CTS
D24
COM4TXD
24 COM4RTS
D25
COM4RXD
25 COM4DCD
D26
COM3DSR
26 COM3RI
D27
COM3DTR
27 COM3CTS
D28
Com3TXD
28 COM3RTS
D29
COM3RXD
29 COM3DCD
D30
LPTPE
30 LPTSLCT
D31
LPTAFD
31 LPTERR
GND
LPTINIT
32 LPTSLIN
+5V
GND
Lines on rows A and C are TTL-Level, except COM signals which have RS 232C level. Row B is
reserved for 32-bit VMEbus extension.
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1.3.2. ADAP-760 Connectors
1.3.2.1. EIDE
Up to two EIDE/SATA drives (harddisk, CD-ROM) can be connected. Cable length should not exceed 40
cm to avoid instable operation.
Use of a 80 conductor EIDE cable is recommended.
Table 1.8. Pinout EIDE Connector X105 (on ADAP-760)
Pin
Name
Name
Pin
1 /RST
GND
2
3 DD7
DD8
4
5 DD6
DD9
6
7 DD5
DD10
8
9 DD4
DD11
10
11 DD3
DD12
12
13 DD2
DD13
14
15 DD1
DD14
16
17 DD0
DD15
18
19 GND
nc
20
21 DREQ
GND
22
23 DIOW
GND
24
25 DIOR
GND
26
27 IORDY
nc
28
29 DACK
GND
30
31 IRQ
nc
32
33 DA1
CBLID
34
35 DA0
DA2
36
37 DCS0
DCS1
38
39 /ACT
GND
40
14
1.3.2.2. COM3 and COM4
Table 1.9. COM3 and COM4 Connectors X103 and X104 (on ADAP-760)
Pin
RS232 async. Signal
1
DCD
2
DSR
3
RXD
4
RTS
5
TXD
6
CTS
7
DTR
8
RI
9
GND
10
nc
The pinout of X103 and X104 on ADAP-760 is such that a crimped cable with a 10 pin edge
connector and a 9 pin Min-D male connector results in the same pinout as Table 11.
15
1.3.2.3. Printer
Table 1.10. Printer / Timer Connector X102 (on ADAP-760)
Pin
Name
Name
Pin
1 STB
AFD
2
3 PD(0)/T0_CLK
ERR
4
5 PD(1)/T0_EN
INIT
6
7 PD(2)/T0_OUT
SLIN
8
9 PD(3)/T1_CLK
GND
10
11 PD(4)/T1_EN
GND
12
13 PD(5)/T1_OUT
GND
14
15 PD(6)/T2_CLK
GND
16
17 PD(7)/T2_EN
GND
18
19 ACK/T2_OUT
GND
20
21 BUSY
GND
22
23 PE
GND
24
25 SLCT
GND
26
16
1.3.2.4. SATA Master + SATA Slave
Table 1.11. SATA Master
Pin
Signal
1
GND
2
TX_P
3
TX_M
4
GND
5
RX_M
6
RX_P
7
GND
Table 1.12. SATA Slave
Pin
Signal
1
GND
2
TX_P
3
TX_M
4
GND
5
RX_M
6
RX_P
7
GND
17
1.3.3. PMCE-740 Connectors
Via the PMC Extension Board (PMCE-740) the BAB 760 can be expanded by two PMC Modules.
1.3.3.1. PMCE-740 VMEbus Connector P1
Only GND, +5V and +12V are routed from the VMEbus Connector P1 to the Power Connector X403. No
VMEbus Signals are used.
Table 1.13. PMCE-740 VMEbus Connector P1 (X402)
Pin
Row A
1...8 nc
9 GND
Row C
nc
GND
10 nc
nc
11 GND
nc
12..14 nc
nc
15 GND
nc
16 nc
nc
17 GND
nc
18..30 nc
nc
31 nc
+12V (Cam)
32 +5V (Cam)
+5V (Cam)
18
1.3.3.2. PMCE-740 PCI Mezzanine Card
Table 1.14. PMCE-740 PCI Mezzanine Card Connectors Jn11, Jn12 (X101, X102).
Pin
Signal Name
Signal Name
Pin
1 TCK
-12V
2
3 GND
INTA#
4
5 INTB#
INTC#
6
7 BUSMDE1#
+5V
8
9 INTD#
PCI-RSVD
10
11 GND
PCI-RSVD
12
13 CLK
GND
14
15 GND
GNT#
16
17 REQ#
+5V
18
19 V(I/O)
AD(31)
20
21 AD(28)
AD(27)
22
23 AD(25)
GND
24
25 GND
C/BE(3)#
26
27 AD(22)
AD(21)
28
29 AD(19)
+5V
30
31 V(I/O)
AD(17)
32
33 FRAME#
GND
34
35 GND
IRDY#
36
37 Signal
+5V
38
39 GND
LOCK#
40
41 SDONE#
SBO#
42
43 PAR
GND
44
45 V(I/O)
AD(15)
46
47 AD(12)
AD(11)
48
49 AD(9)
+5V
50
51 GND
C/BE(0)#
52
53 AD(6)
AD(5)
54
55 AD(4)
GND
56
57 V(I/O)
AD(3)
58
59 AD(2)
AD(1)
60
61 AD(0)
+5V
62
63 GND
REQ64#
64
19
Table 1.15. PMCE-740 PCI Mezzanine Card Connectors Jn21, Jn22 (X201, X202).
Pin
Signal Name
Signal Name
Pin
1 +12V
TRST#
2
3 TMS
TDO
4
5 TDI
GND
6
7 GND
PCI-RSVD
8
9 PCI-RSVD
PCI-RSVD
10
11 BUSMODE2#
+3,3V
12
13 RST#
BUSMODE3#
14
15 +3,3V
BUSMODE4#
16
17 PCI-RSVD
GND
18
19 AD(30)
AD(29)
20
21 GND
AD(26)
22
23 AD(24)
+3,3V
24
25 IDSEL
AD(23)
26
27 +3,3V
AD(20)
28
29 AD(18)
GND
30
31 AD(16)
C/BE(2)#
32
33 GND
PMC-RSVD
34
35 TRDY#
+3,3V
36
37 GND
STOP#
38
39 PERR#
GND
40
41 +3,3V
SERR#
42
43 C/BE(1)#
GND
44
45 AD(14)
AD(13)
46
47 GND
AD(10)
48
49 AD(8)
+3,3V
50
51 AD(7)
PMC-RSVD
52
53 +3,3V
PMC-RSVD
54
55 PMC-RSVD
GND
56
57 PMC-RSVD
PMC-RSVD
58
59 GND
PMC-RSVD
60
61 ACK64#
+3,3V
62
63 GND
PMC-RSVD
64
20
1.3.3.3. PMCE-740 PCI Mezzanine Card I/O Routing
Table 3.14 shows the routing of the PMC I/O Connectors to the VMEbus P2 Connector
Table 1.16. PCI Mezzanine Card Back Plane I/O Routing.
(X203) Host (X103) Host
Jn24
Jn14
(X401)
VMEbus P2
(X103) Host
Jn14
(X401)
VMEbus P2
1C
33
17C
33
1
34
2
1A
34
17A
35
3
2C
35
18C
36
4
2A
36
18A
37
5
3C
37
19C
38
6
3A
38
19A
39
7
4C
39
20C
40
8
4A
40
20A
41
9
5C
41
21C
42
10
5A
42
21A
43
11
6C
43
22C
44
12
6A
44
22A
45
13
7C
45
23C
46
14
7A
46
23A
47
15
8C
47
24C
48
16
8A
48
24A
49
17
9C
49
25C
50
18
9A
49
25A
51
19
10C
51
26C
52
20
10A
52
26A
53
21
11C
53
27C
54
22
11A
54
27A
55
23
12C
55
28C
56
24
12A
56
28A
57
25
13C
57
29C
58
26
13A
58
29A
59
27
14C
59
30C
60
28
14A
60
30A
61
29
15C
61
31C
62
30
15A
62
31A
63
31
16C
63
32C
64
32
16A
64
32A
21
1.3.3.4. PMCE-740 Power Connector
Table 1.17. PMCE-740 Power Connector
Pin
Description
1
+5V out
2
GND
3
GND
4
+12V out
22
1.4. Board Parameters
1.4.1. Host Bus
133 MHz
1.4.2. VMEbus
VMEbus interface according to specification ANSI/IEEE STD 1014-1987 (Rev. D1.4)
VMEbus Master/Slave Capabilities:
Single cycle:
A16/A24/A32/A64:D08(EO)/D16/D32/UAT
A40:D08(EO)/D16/MD32
RMW (Master only):
A16/A24/A32:D08(EO)/D16/D32
A40:D08(EO)/D16/MD32
BLT:
A24/A32/A64:D08(EO)/D16/D32
A40:D08(EO)/D16/MD32
MBLT:
A24/A32/A64:D64
ADO:
A16/A24/A32/A40/A64/CR/CSR
ADOH:
A16/A24/A32/A40/A64
System Controller Options:
Arbiter:
BTO(16/32/64), forever
IACK daisy-chain driver
SYSCLK driver
23
Arbiter Options:
PRI, RRS, SGL
BBSY filter
BBSY filter
Any one of BR(0-3)
RWD, ROR, ROC
Bus ownership timer 16 ms... 1024 ms, forever
Interrupt Handler Options:
IH(1-7)
D08(O), D16, D32
Interrupter Options:
I(1-7)
D08(O), D16, D32
Auto Configuration:
FSD, ASI
Address Range:
Four PCI target/VME master windows: base and size programmable, 64 KB to 1 GB window size, any of
specified address capabilities or user-defined.
Four VME slave/PCI initiator windows: base and size programmable, 64 KB to 4 GB window size, any of
specified address capabilities or user-defined.
24
1.4.3. PCI Local Bus
CPU to PCI Transfer Options:
Write post buffer
Max. 120 MB/s (peak)
PCI to Memory Transfer Options:
Max. 120 MB/s (peak)
Clock Speed:
33.3 MHz on PCI1, 33.3 or 66.6 MHz on PCI0
IRQs:
Four PCI interrupts rerouted to selectable interrupts
1.4.4. Network
10BaseT/100BaseTx (twisted-pair)
Transfer Speed:
max. 10/100 Mbit/s
1.4.5. EIDE
UDMA 133
1.4.6. Serial I/O
COM1, COM2:
Full duplex, asynchronous
50 b/s - 115.2 Kbit/s
RS232 level
COM3, COM4:
Full duplex
50 b/s - 230,4 KB/s asynchronous
RS232 level
1.4.7. Keyboard
MF2/AT mode
PS/2 mode
25
1.4.8. Mouse
PS/2 mode
Serial mouse at channel 1 or channel 2
1.4.9. Parallel I/O
Centronics bidirectional, unbuffered TTL
Transfer Rate: max. 2 MB/s
1.4.10. MTBF Values
Includes one 128 Mbyte SODIMM:
34 938 h(computed after MIL HDBK-217E)
468 980 h (realistic value from industry stand experience)
1.4.11. ESD Values
2 kV (Human body method)
1.4.12. Environmental Conditions
Storage Temperature: -40 °C - +70 °C (non condensing)
Operating Temperature: 0 °C - +50 °C (1 m/s forced air cooling)
1.4.13. Maximum Operating Humidity:
85% relative
1.4.14. Power Requirements
Total Power Requirements (with one 128 MByte SODIMM, without PCI extensions):
4.2 A max. 2.8 A typ. +5 VDC +/-5% (800 MHz 750FX)
5.7 A max. 4.3 A typ. +5 VDC +/-5% (933 MHz or more 750GX)
100 mA max. 30 mA typ. +12 VDC +/-10%
100 mA max. 10 mA typ. -12 VDC +/-10%
1.4.15. Battery
Type M4T32-BR12SH1
Approx. 12 years life time
26
1.5. Jumpers
1.5.1. On-board Jumpers
Parts Side Jumpers
27
1.5.1.1. User-settable Jumpers
Table 1.18. Boot ROM Select (J1001)
J1001_1-2
(BOOTSWAP)
J1001_3-4
(EXTBOOT)
Description
open
open
open
closed
boot from System Flash (default)
closed
open
boot from lower half of User Flash
closed
closed
boot from upper half of User Flash
reserved
The EXTBOOT jumper swaps the address space of the User and System Flash. The BOOTSWAP jumper
swaps the halves within the USER Flash (i.e. inverts the most significant address bit). Changing the
EXTBOOT jumper while the system is running is not allowed because the chipset needs to know the
width of the Flash devices and this is only sampled at reset (i.e. the change of the width becomes
effective only after the next reset).
Table 1.19. VMEbus SYSRESET (J1401, J1502)
J1401 (RI)
J1502 (RO)
Function
-
-
no VMEbus SYSRESET
closed
-
VMEbus SYSRESET is input
-
closed
VMEbus SYSRESET is output (default)
closed
closed
not allowed
Table 1.20. VMEbus SYSFAIL (J1501)
J1501 (FO)
open
closed
Function
no VMEbus SYSFAIL
VMEbus SYSFAIL output enable (default)
Table 1.21. COM3 and COM4 DSR Support (J1601)
J1601_1-2,
J1601_3-4
(GND3, GND4)
open
closed
Function
ADAP supports DSR signal (default for ADAP-760)
ADAP no DSR support (ADAP-740)
28
1.5.2. PMCE-740 Jumpers
PMCE-740 Jumper and Connectors
1.5.2.1. PMCE-740 User-settable Jumpers
Table 1.22. PMC Slot 1 PCIREQ and PCIGNT Routing
J201
J202
Description
1-2
1-2
Use PCIREQ, PCIGNT of PMC Slot 0 (not
recommended)
3-4
3-4
Use PCIREQ, PCIGNT of PMC Slot 1 (default)
Table 1.23. PMC Slot 1 Interrupt Routing
J204
Description
1-2
Route PMC IRQ A to PCI IRQ A
3-4
Route PMC IRQ A to PCI IRQ B
5-6
Route PMC IRQ A to PCI IRQ C
7-8
Route PMC IRQ A to PCI IRQ D
29
1.5.3. ADAP-760 Jumpers
Parts Side Jumpers and Connectors
Table 1.24. ADAP-760 EIDE / SATA Recommeded Configurations
Configuration
J201 (DIS-M)
J203 (DIS-S)
SATA Master only
open
closed
SATA Master & Slave
open
open
EIDE Master only or Master &
Slave
closed
closed
* EIDE Master & SATA Slave
closed
open
* SATA Master & EIDE Slave
open
closed
* Mixed EIDE/SATA operation is not recommeded as normal operation mode (see also: "A.8.3. Mixed
EIDE/SATA Operation").
30
Chapter 2. LINUX part
2.1. Prepare your developement system
2.1.1. Serial terminal program
In order to connect to the targets serial console, you need a terminal program. This is necessary during
development, as the bootloader and the Linux output can only be seen at the serial console. Later you
may connect to the camera using a telnet or rsh client.
We recommend to use minicom, which is a text based terminal program. If it is not installed on your
system, you need to install it and do some basic setup.
2.1.1.1. Installation of minicom under SuSE Linux
Under SuSE Linux minicom is contained in the package n (Network). Install it with yast or yast2.
2.1.1.2. Minicom setup
The bootloader and Linux are using the following serial parameters: 9600 8N1 (9600 baud, 8 data bits, 1
stop bit, no parity). You must adjust these parameters as root.
Start minicom as root with the parameter -s:
minicom -s
2.1.1.2.1. Serial port setup
Use the menuitem serial port setup to see the following menu:
31
Minicom setup screen
The important items are "A", "E", "F" and "G". In this case we use COM1 on the development system
(/dev/ttyS0), the baud setup explained before and no flow control.
2.1.1.2.2. Modem parameter setup
Minicom is intended to be used for modem connections too. As we do not want so send e.g. dialup
prefixes to the BAB760 we need to delete all strings in the next dialog box.
32
Minicom serial parameters
2.1.1.2.3. Saving the setup
Save the setup e.g. as com1. Later, minicom can be used with this setup by normal users just by typing
minicom com1.
2.1.2. Bootp server
If you want to develop applications for the BAB760, you need to transfer the Linux image to the BAB760
in order to store it to flash or to boot it. This is done by a bootp and a tftp daemon. If one of the deamons
is missing, have a look at the following description.
2.1.2.1. Installing the bootp daemon under SuSE Linux
Under SuSE Linux the bootp daemon bootp-DD2 is contained in the package n (Network). Install it with
yast or yast2.
The tftp daemon is contained in the package n (Network) too.
2.1.2.2. Important configuration files
You need to edit some configuration files. This can only be done as root.
2.1.2.2.1. /etc/services
Be sure that the lines containing tftp and bootp are not commented out with "#".
33
2.1.2.2.2. /etc/inetd.conf
Look for the two lines beginning with tftp and bootp. They must look like this.
tftp dgram udp wait root /usr/sbin/in.tftpd in.tftpd -s /tftpboot
bootps dgram udp wait root /usr/sbin/bootpd bootpd -c /tftpboot
2.1.2.2.2.1. tftpboot directory
You need to create the directory /tftpbootfor your boot images and change the access right as root. If you
choose another name, change the name in /etc/inetd.conf.
mkdir /tftpboot
chmod 777 /tftpboot
2.1.2.2.3. /etc/bootptab
This file contains the parameters for each bootp client. The following example shows the entry for one
BAB760 with the ethernet hardware address 00005b0097cc. It will get the network address
192.168.4.159. The boot image will be BAB760_sample.img.
BAB760 :hd=/:\
:ip=192.168.4.159:\
:sm=255.255.255.0:\
:hn:\
:ht=ethernet:\
:ha=00005b0097cc:\
:bf=BAB760_sample.img:
You can find the hardware address by using the printenv command in the PPCBoot bootloader. See the
PPCBoot chapter for details.
2.1.2.3. Restarting inetd
After changing all configuration files you need to restart Linux or at least the inetd, bootpd and tftpd. You
need not to restart if you only changed /etc/bootptab !
To restart all daemons invoked you can do the following as root:
killall inetd
killall in.tftpd
killall bootpd
inetd
2.1.3. ELinOS Installation
The installation of ELinOS is described in detail in the ELinOS manual. Please read it, its excellent.
For simplicity you should perform a full install.
2.1.4. Installation of BAB760 kernel sources
The kernel sources for BAB760 are not contained on the ELinOS CD, but provided seperatly by ELTEC,
34
and must be installed after installing ELinOS.
ELinOS is installed in the directory /opt/elinos. One subdirectory contains the Linux kernel sources. It is
named linux-2.4.18 or similar.
You must install the BAB760 kernel in the directory /opt/elinos too. This is simply done by unpacking the
shipped tgz file.
We assume that the BAB760 kernel is contained on a cdrom. Perform the following steps as root.
mount /cdrom
cd /opt/elinos
tar xjvf /cdrom/linux-2.4.18-2.4.18-eltec-3.tar.bz2
umount /cdrom
Note
The file name of the linux kernel may differ from the one noted above. Please have a look at the
file README distributed with the kernel.
2.1.5. BAB760 sample projects
There are sample projects available for the BAB760. This section explains how to install these samples.
For detail concerning these samples please see the README coming with the samples.
The sample project is assumed to be on a cdrom too. Copy it to a directory of your choice. You need not
to do this as root.
mount /cdrom
cd ~/elinos
tar xzvf /cdrom/BAB760-20030326.tgz
umount /cdrom
cd BAB760
These steps create a directory BAB760 which contains the BAB760 sample project.
1.
Change to the directory BAB760 and call configure. All questions can simply be answered by
pressing "ENTER". This step is done to set up directory paths properly.
user@host:~ > cd BAB760
user@host:~/BAB760 > ./configure
...
ELINOS_CPU
= ppc
ELINOS_ARCH
= 60x
ELINOS_LIBC
= libc6
ELINOS_DOSNAME = BAB760
ELINOS_BOOT_STRAT = ppcboot_multi
2.
Call ELINOS.sh as described in the ELinOS manual. . ELINOS.sh
3.
Connect the project to the proper kernel ! elinos-linkkernel -n
35
--kernelsrc=/opt/elinos/linux-2.4.18-2.4.18-eltec-3
Now you can start the ELinOS configurator elk, compile the kernel, modules and user applications as
described in the ELinOS manual.
2.1.6. Downloading and running the sample project
After building, the BAB760 kernel image should be located in the /tftpboot directory. The PPCBoot
monitor can now load and execute the image with boot command.
For details see the README coming with the sample.
2.2. U-Boot
2.2.1. What is PPCBoot/U-Boot ?
PPCBoot is a monitor for Embedded PowerPC boards, which can be installed in a boot ROM and used to
test the hardware or download and run application code. PPCBoot is free software developed under GNU
General Public License. The development of PPCBoot is closely related Linux. The latest version can be
taken from http://ppcboot.sourceforge.net.
2.2.2. Common U-Boot commands
The following is a description of common PPCBoot commands. A full list of supported commands is
printed by command h at PPCBoot commandline. Paramters for any command can be obtained with h
[command].
All address, size, offset, etc. values have to be entered in HEX format without leading '0x' or 'h'.
Table 2.1. Common PPCBoot commands
Command
Parameter
boot
Description
Exec boot command bootcmd.
bootm
bootm [addr]
bootp
bootp addr
Boots a previous at address "addr" loaded
PPCBoot image. "addr" has not to be given,
because last load address from bootp, will be taken
as default.
Exec a BOOTP request and store the loaded
image at address "addr". A few environmnet
varibles will be set: ipaddress, bootfile, etc. ...
If no addr is given a board specific compiled in
default is used.
cp
cp [.b, .w, .l] source
destination count
Copy memory areas (in previous erased Flash
also).
.b : Byte
.w : Short
36
Command
Parameter
Description
protect on
protect on start end
Enable FLASH write protection (software)
protect off
protect off start end
Disable FLASH write protection (software)
erase
erase start end
Erases Flash-ROM
.l : Long
flinfo
Print information about installed Flash-ROM.
h
h [command]
Print compiled in help text for command.
md
md[.b .w .l] addr len
Memory Dump
.b : Byte
.w : Short
.l : Long
mm
m[.b .w .l] addr
Memory Modify, auto increments addresses.
.b : Byte
.w : Short
.l : Long
reset
Restart PPCBoot monitor
saveenv
Stores the current environment in Flash
setenv
setenv variable value
Set an environment variable.
fsinfo
Print information about JFFS (User FLASH)
ls
List files in JFFS (User FLASH)
fsload
fsload offset filename
Load binary file from User FLASH (JFFS) to offset
2.2.3. U-Boot Environment
The following table is a description of common PPCBoot environment variables.
All changes with command setenv are temporary only and will be lost after next reset. To store changes
permanently the saveenv command has to be used.
2.2.3.1. Standard Environment
Table 2.2. Standard PPCBoot environment
Variable
Default
Description
bootargs
not set
Kernel-Parameters, to setenv bootargs root=ramfs
be passed to Linux
kernel.
bootcmd
bootp 1000000
Example
Script for command
boot or Autoboot
37
Default script:
Variable
Default
Description
Example
sequence.
setenv bootargs\
(1)Load boot image via bootp at
address 1000000h.
root=ramfs\
(2) Set environment variable
bootargs to "root=ramfs...".
ip=$(ipaddr):\
$(serverip):\
(3) Start image at address
1000000h.
$(gatewayip):\
$(netmask):\
$(hostname):\
eth0:none;\
bootm
bootdelay not set:
Autoboot without delay Delay time in seconds till exec of
command boot. Environment
variable bootcmd is used for
command boot. setenv bootdelay
5
gatewayip
Gateway IP address
Is set from bootp
command with
informations supplied
by Bootp-Server. Can
be passed to Linux
kernel as kernel
parameter.
hostname
Hostname
Is set from bootp
command with
be passed to Linux
kernel as kernel
parameter.
ipaddr
Own IP address
Is set from bootp
command with
be passed to Linux
kernel as kernel
parameter.
netmask
IP network mask
38
Variable
Default
Description
Example
Is set from bootp
command with
be passed to Linux
kernel as kernel
parameter.
serverip
IP address of
Bootp-Server
Is set from bootp
command with
be passed to Linux
kernel as kernel
parameter.
2.2.3.2. Extented Environment
The following is a description of ELTEC specific PPCBoot environment extentions for BAB760.
All changes with command setenv are temporary only and will be lost after next reset. To store changes
permanently the saveenv command has to be used.
2.2.3.2.1. Extented Environment
Table 2.3. Extented PPCBoot environment (ELTEC)
Variable
Default
Description
Example
ata_reset_time
10
seconds
Timeout for ATA devices to
respond after bus reset. NOTE:
Time may be set to zero if board
does not have an IDE interface.
setenv ata_reset_time
60
scsi_reset_time
10
seconds
Timeout for SCSI devices to
respond after bus reset. NOTE:
Time may be set to zero if board
does not have an SCSI interface.
setenv ata_reset_time
60
l2cache
not set
Enable or disable L2 caching
setenv l2cache 0
means L2
cache
enabled
ide_dma_off
not set
Setup user register of IDE
setenv ide_dma_off 15
controller to disable DMA
(disable all DMA for
transfers. For some IDE devices
Dev 0/1 on Bus 0/1)
like ZIP drives this environment
must be set to work under Linux.
For the Linux kernel a patched IDE
39
Variable
Default
Description
Example
driver (sl82c105.c) is provided.
value 1 for Device 0 on Bus 0
Add values to disable DMA for
multible devices. Enter decimal
value.
videomode
not set
If board is equipted with PMC
setenv videomode
graphic extension PMView
317; saveenv; reset
means
(SMI7xx) PPCBoot console will be
videomode switched to graphic mode as
800x600 default. With this environment the
8bit
videomode can be changed in size
and frame buffer bit depth. To
switch mode save environment
and reset board.
value 303 for 800 x 600 x 8bit
(default)
value 31a for 1280 x 1024 x 16bit
value 31b for 1280 x 1024 x 24bit
console
not set means
default is
graphic
console
If board is equipted with PMC
setenv console serial
graphic extension PMView
(SMI7xx) PPCBoot console will be
switched to graphic mode as
default. With this environment the
console i/o can be forced to serial
port.
string "serial"
force switching to serial console
i/o.
2.2.4. Flash-ROM mapping for BAB760
40
BAB760 is equiped with 8 MByte User Flash and 512 KByte System Flash eprom. The factory default
mapping (J1001 1-2 open, J1001 2-3 closed) starts at address at 0xFC000000. See also hardware
documentation for details.
Table 2.4. BAB760 Flash ROM mapping
Start
End
Description
0xFC000000
0xFC7FFFFF
8 MByte User Flash for JFFS/JFFS2 (Journalling Flash
Filesystem).
0xFE000000
0xFFFFFFFF
512 KByte System Flash 64 times mirrored.
0xFFF00000
0xFFF3FFFF
256 KByte for U-Boot Monitor code (System Flash).
2.2.5. Standalone Boot
1.
Build a kernel image (including a demo or other application; type ppcboot_multi) with support for
MTD for BAB760 , JFFS2 and NFS option (this is all included in delivered default kernel-config).
Make sure that the eraseall command is included. Boot this image via bootp.
2.
On BAB760 shell check the MTD entry with command cat /proc/mtd. The first entry 'mtd0' represents
the whole Flash device. Depending on the hardware the PPCBoot Monitor part is located together
with the JFFS in a single Flash or is stored in a seperate Sytem Flash device. To store the
standalone boot image the entry called JFFS Persistant storage must be used. In the text below this
device is called mtdX where X is the block number.
If JFFS Persistant storage is used for the first time (or for cleanup) the mtdX must be formated with:
eraseall /dev/mtdX
3.
Insert JFFS device into target file system.
~ # mount /dev/mtdblock# /mnt -t jffs2
4.
Configure the network and copy kernel/application via NFS into Flash
~ # ifconfig eth0 192.168.2.105
~ # mount 192.168.2.100:/nfsroot /host -o nolock,noac,mountvers=2
~ # cp /host/network.img /mnt
~ # ls -l /mnt
5.
Reboot linux and boot the new kernel with PPCBoot commands.
=> ls
=> fsload 1000000 network.img
=> bootm 1000000
6.
The PPCBoot bootcmd may be changed to autoboot after powerup directly from Flash. (You need to
41
type the "\" to mask the ";".)
=> setenv bootcmd fsload 1000000\; setenv bootargs root=ramfs\; bootm
7.
To configure the network at Linux kernel load the environment ipaddr may be set and saved.
Otherwise the network can be configured in init-task with ifconfig eth0 ....
2.2.6. U-Boot Update
The current version of U-Boot supports all necessaries to initialize the board and to run linux. If you plan
to modify U-Boot to special applikation requirements please contact ELTEC support group.
2.3. Using ELinOS demonstration projects
2.3.1. Cloning a project
After installing ELinOS and the BAB760 linux kernel, you can use ELinOS elk for cloning the ELinOS
demo projects.
Please read the ELinOS manual for details.
Start /opt/elinos/bin/elk e.g. from a shell. Elk comes up with a dialog. Use Clone an existing project.
42
Now choose one of the ElinOS sample project direcories in the file-select-box
Choose next in the dialog box.
Select a directory for installation in the next dialog.
43
Choose the libc model you want your binaries to be linked with.
44
In the next step choose the ppcboot_multi boot strategie for the BAB760.
45
Now you have to select the previously installed ELTEC kernel for the BAB760.
The last step is to provide a DOS compatible name for your project.
46
Now you have cloned a project and are nearly ready to compile it.
The last step is to import a proper .config file into your linux directory. The most recent .config file is
contained in the previously installed kernel sources
Select Kernel Configuration in the left panel of elk and use the Import button.
Switch to the subdirectory linux/arch/ppc/configs and choose the default configuration.
Now you are ready to compile your project. Please remember to copy the image to your tftpboot directory.
2.4. VMEbus Driver
2.4.1. Foreword
What follows is a short description of a driver for Linux version 2.2 and how it may be used, both from
application level (user mode) code and as a foundation layer to write kernel mode device drivers for
specific VME boards.
The goal was to make a simple interface yet powerful enough for most real life applications. It also tries to
be generic enough to be applicable as a model to other VME bridges; however the design of this driver
has been influenced by the capabilities and characteristics of the Universe: this is hard to avoid.
This is a work in progress and as such it is possible that the layout of structures and values of symbolic
constantsYou may also suggest better names for the symbolic constants, some of the choices are very
poor due to lack of imagination. Corrections, clarifications and improvements to this documentation are
also welcome will change in the future.
However, the code is now fairly stable and source level compatibility will be maintained as much as
possible (provided that, as shown in the examples, structure initialisers explicitly specify field names; this
is a GCC extension but it makes the code more readable and clearly more robust against structure layout
changes).
This driver has been designed to be used in VME systems with a single master (the Universe itself) and
47
only slaves on the VME Bus. Although nothing in theory prevents from using it in systems with multiple
masters, it has not been tested under these conditions (VME slave image registers neither set nor used).
This documentation assumes a minimal knowledge of kernel programming and concepts. It is not a
primer on VME bus either. Trying to understand the source code of the driver without an Universe manual
and the relevant errata is probably a loss of time.
Minimal system requirements are: Linux kernel 2.2.4, glibc2.1 based system, egcs-1.1.2 compiler. Tests
have shown that gcc-2.7.2 incorrectly compiles the Universe driver on Intel platforms.
The next major release of the driver will be for kernel 2.3 or 2.4 since the resource allocation system will
make the system much safer (less prone to collisions) for a device like the Universe with its potentially
large slave image regions.
2.4.2. Features
The Universe driver provides the following features:
•
application level access to VME bus for privileged programs using open, ioctl, mmap, and close
system calls; read, write, and seek have been implemented on the PPC architecture only during and
might be removed in the future.
•
kernel level functions that simplify writing device drivers for specific VME boards. These functions
include registering and unregistering devices, mapping the device registers in kernel address space,
handling interrupts, performing DMA transfers and a few miscellaneous functions.
•
some files in the /proc/bus/vme directory which give hopefully useful information about the state of the
Universe and board specific drivers.
2.4.3. A few policy issues
2.4.3.1. Kernel and application include files
The patches and tar files will different vme.h files in the kernel and application include files. This is
necessary to deal with some differences, especially in byte ordering handling. Header files for board
specific drivers may be either separate or linked, but the directories (typically /usr/include/vme and
/usr/src/linux/include/vme) must be different. Actually keeping the user header file as a symbolic link to
the kernel header file is handy during early developemnt of a driver but does not make much difference
later (including vme/vme.h will actually not include the same file depending on the context).
2.4.3.2. Minor device number allocation
2.4.4. Configuring your kernel
As a first step, you have to select CONFIG_EXPERIMENTAL in the `General Setup' menu. This will
enable a new menuOn the PPC and i386 architectures only for the moment item titled `VME bus support'
which will present a list of options.
The first of these options, CONFIG_VMEBUS has to be enabled and cannot be modularised (it adds so
little code to the kernel that it's not worth giving the `m' option). The others are (at least) the Universe
driver and perhaps additional board specific modules.
2.4.5. Driver loading and chip initialisation
We have unfortunately now to tackle one of the most difficult problems with the Universe chip. It is so
48
dependant on the specific board and its firmware that only generic indications can be given.
Let us start from the driver requirements. It needs:
•
access to the registers, normally the PCI initialisation sets it correctly at power up since their location
is defined by a standard PCI base register in the configuration space.
•
PCI slave image 0 has to be allocated 8 kB of free PCI memory space and is reserved for internal
uses by the driver.
•
all other slave images, including the special slave image, must be allocated in PCI memory space, I/O
space is not supported.
In the universe_setup function, there is one section which is compiled whenever
UNIVERSE_IMAGE_SETUP is defined. This section should be enabled and edited to suit the needs of
each system if the firmware does not provide the necessary functionality, but beware of conflicts in the
PCI memory space. The settings in the early parts of this function can also be modified to select specific
global features of the Universe like time outs...
The Universe module supports one parameter: permanent_maps which is a bit mask of the images which
should be permanently mapped for access by kernel drivers (you may also change its default value by
editing the source code). The least significant bit represents the special slave image, other images are
represented by bit of weight 2^n, where n is between 1 and 3 or 7 depending on Universe version
number. Permanent mappings consume precious kernel virtual address space and should be used
sparingly, but may bring some performance improvements on architectures which have special
mechanisms to allow mapping large chunks of virtual address spaces.
2.4.6. Accessing the VME bus from application programs
2.4.6.1. Opening the device
To access devices on the VME Bus, you simply use the standard open system call with the appropriate
parameters.
This device currently uses major number 60 reserved for experimental drivers (the corresponding device
can be created by `mknod /dev/vme c 60 0'). An official number might be allocated in the future.
Considering the number of different VME boards in existence and to avoid creating name conflicts, it
might be better to create a separate /dev/vme directory and give raw access to VME devices by opening
/dev/vme/raw. This is however a matter of local policy on each system and will not be further discussed.
2.4.6.2. Selecting the type of VME accesses you want to perform
Here things start to be more complex, VME provides a variety of address spaces characterised by the
number of address bits, the privilege level, whether bursts transfers used or not, etc
However, using as many device minors as potential addressing combinations is not practical simply
because it would have required to create a large number of device files, possibly even hitting the current 8
bit limit on minors (especially when you consider all the options given in the driver and the number of
possible combinations with the extended addressing mode field introduced by the 2eVME standard). So
there is a single minor device number (0), reserving all other minors for board specificGiven the number
of VME boards in existence, minor numbers will probably have to be allocated in a system specific or
organisation specific way. Alternatively an ioctl to load or select a specific board interface to override the
default /dev/vme interface described here might be added. device drivers.
For this reason, the combination of address modifier and data width to use when accessing a device is
49
specified with an ioctl called VME_SET_ATTR, which takes as a parameter a structure of type VME_attr
consisting of 3 fields.
Two of these fields, base and limit, simply specify the address of the first and last byte you want to access
in the space described by the third field called flags which specifies three things: the VME address space
you want to access, the possible data width or widths to use and through which mechanisms you want to
use to access this area.
The first 2 are specified using one the names listed in table 1. When accessing some devices, it is
possible that the maximum data width enforced by the bridge (which in the case of the Universe, splits
large transfers into a series of smaller ones) is unimportant. In this case, the width parameter to the
VME_AM may be a the logical or of several data widths. For example, to access a D08(O) slave in the
privileged A16 space, the flags may be set to VME_AM_A16_PRIV(8|16|32).
Given the characteristics of the VME bus, the following width settings make sense:
•
[8:] to force the Universe to split multi-byte transfers into a series of single byte transfers, this is only
useful with D08(EO) slaves which are quite rare.
•
[16:] to force the Universe to split 32 bit (or larger) accesses into a series of 16 bit transfers, this is
significantly faster then consecutive 16 bit accesses when accessing D16 slaves.
•
[32:] to get maximal performance when accessing D32 slaves,
•
[16|32:] to access D16 slaves when no single accessSome processors may require inserting an
explicit barrier instruction to prevent merging accesses to adjacent locations into a single larger
transfer, for example on Power PC an `eieio' instruction may be required. will be larger than 16 bits.
•
[8|16|32:] to access slaves when only byte access will be performed, which is always the case for
D08(O) boards.
Table 2.5. [VME address modifier names]VME address modifier names, they are
all followed by the desired data width between parentheses.tbl:am
Name
Possible widths
VME_AM_A16( )
8, 16, or 32
VME_AM_A16_PRIV( )
8, 16, or 32
VME_AM_A24( )
8, 16, or 32
VME_AM_A24_PRIV( )
8, 16, or 32
VME_AM_A24_PROG( )
8, 16, or 32
VME_AM_A24_PROG_PRIV( )
8, 16, or 32
VME_AM_A24_BLT( )
8, 16, or 32
VME_AM_A24_BLT_PRIV( )
8, 16, or 32
VME_AM_A24_MBLT( )
64
VME_AM_A24_MBLT_PRIV( )
64
VME_AM_A32( )
8, 16, or 32
VME_AM_A32_PRIV( )
8, 16, or 32
VME_AM_A32_PROG( )
8, 16, or 32
VME_AM_A32_PROG_PRIV( )
8, 16, or 32
50
Name
Possible widths
VME_AM_A32_BLT( )
8, 16, or 32
VME_AM_A32_BLT_PRIV( )
8, 16, or 32
VME_AM_A32_MBLT( )
64
VME_AM_A32_MBLT_PRIV( )
64
VME_AM_CRCSR( )
8, 16, or 32
2.4.6.3. Diagnostic ioctl
ioctl is designed to provide a safe way to check for the presence of a device. It performs a read or write
cycle to the specified VME address space with the required characteristics and checks for bus errors or
timeouts in a safe way (returning -EIO in this case).
Reading and writing: read and write calls are not guaranteed to work because of the limited virtual
address space from the kernel. These functions have been implemented on some architectures only
(PPC for now). They are also implemented in a way that minimises the number of instructions which
transfer data between the VME bus and the processor. Therefore the data bus width parameter used
when selecting the attributes should match exactly the capabilities of the slave.
The preferred method is to use the mmap system call to map the device in the virtual address space of
the process.
Accessing a device directly by memory mapping:
Other functions: RMW cycles: ioctl.
2.4.7. Access to VME from kernel mode (writing board specific
drivers)
2.4.7.1. Registering a driver
when loaded, note that minor number may be a parameter in /etc/conf.modules and the device might also
be created dynamically by scripts to ensure that they match). A genuine dynamic minor allocation scheme
might be added in the future.
2.4.7.2. Checking that a device is responding
Most VME boards do not implement the CR/CSR address space and are simply configured by setting
jumpers, which is error-prone. A given board might also have been unplugged but boot scripts might start
a process which needs access to the board or loads the corresponding driver. For these reasons a simple
mechanism to help checking for hardware failures has been implemented, the function
vme_safe_access(unsigned int code, unsigned int flags, unsigned long offset, unsigned long *data)
performs a single access to the VME bus and checks for bus errors or timeouts; code is one of the
VME_safe_access ioctl codes, flags specifies the address space (the USE field is ignored), offset and
data have their obvious meanings.
2.4.7.3. Direct access to VME bus devices
struct vme_region
vme_register_region (and unregister)
vme_map_region ?
51
vme_check_region ?
shows in /proc
checks are performed regardless of the transfer type (MBLT/BLT/DATA/PROGRAM and PRIVILEGE)
because a) MBLT transfers will fallback to BLT for transfers of less than 8 bytes and to DATA or
PROGRAM for RMW cycles. b) Non privileged areas also respond to privileged transfers.
2.4.7.4. Interrupts
struct vme_interrupt
next: handled by the Universe driver (must be initialised to NULL),
device: must be initialised to NULL, handled by the Universe driver,
handler: pointer to a function taking a vme_interrupt parameter. This function is called when the interrupt
happens. It is not recommended to change it while the interrupt is active (although nothing serious should
happen).
level, vector: must be initialised before calling vme_request_interrupt and may not be changed until the
interrupt is released.
vme_request_interrupt
vme_release_interrupt
shows in /proc
2.4.7.4.1. Interrupt handlers
2.4.7.5. DMA
struct vme_dma, vme_dmavec
When can each and every element be modified:
next: handled by the Universe driver (must be initialised to NULL),
queue: only used by the Universe driver while the DMA is being performed or waiting for its turn in the
queue, free for use by the board specific driver while not queued (for example to handle its own list of free
DMA lists).
device: must be initialised to NULL, handled by the Universe driver,
maxfrags: must be initialised before calling vme_alloc_dmalist and may not be changed until
vme_free_dmalist is called
private: must be initialised to NULL, handled by the Universe driver
timeout: must be set before calling vme_queue_dmalist, never modified by the Universe driver
flags: 2 bits are used by the universe driver for locking, more might be used in the future.
vme_alloc_dmalist (name might change)
In the current implementation, setting the maximum number of fragments to a non power of 2 wastes
some memory since the enforced limit will be lower than the amount actually needed.
52
vme_queue_dmalist
Writers of device drivers are supposed to be able to avoid these problems (note that they may keep the
DMA lists on their own queue since the queue element of the structure is only used by the Universe driver
while the AMA is on the active list).
vme_free_dmalist
Limitations: the size of the private area used by the driver to build the scatter/gather list is at most one
page. This limits the list to 128 entries on architectures with a 4kB page size. This is not a practical
limitation since there is no limit on the number of entries in the DMA operation queue, although it will
cause a slight overhead consisting of one additional interrupt for every 128 elements in the DMA list
(every 512kB if the list is used to scatter/gather page sized chunks).
vme_alloc_dmalist and vme_free_dmalist may not be called from interrupt handlers: the first one may
sleep to allocate memory, the second one waiting for the DMA operations in progress to terminate.
2.4.7.5.1. DMA termination handlers
2.4.7.6. Other functions
vme_safe_access
checks for bus errors and returns -EIO if they happen
vme_special_access Beware of portability: semantics dictated by the way the Universe implements them.
2.4.7.7. Restrictions
Interrupt and DMA termination handlers can only call vme_safe_access, vme_special_access and
vme_queue_dmalist. All other calls from the handlers are forbidden and might calls system deadlocks,
especially in multiprocessor (SMP) systems.
Side note: it might seem strange to also allow vme_safe_access since it does not seem to have any
practical usage. However, imagine that there is an interrupt which tells that a new device is
present(thanks to hot-plugging), then allowing this function for probing the new devices makes sense. Or
a loaded driver may occasionally set a timer and periodically check for the presence of a board (this is
safe if the board includes a CR/CSR space whose address is setup by the geographical addressing pins).
2.4.7.8. Unregistering the driver
when unloading the module. (releases all allocated resources as reported by /proc interface as well as
DMA scatter-gather lists).
2.4.8. Caveats
VME Bus monopolisation due to CWT.
Getting an interrupt although it has been disabled, because of the write posting delay effect on interrupt
control registers. May use vme_safe_access to disable interrupts before releasing them or unregistering
the device.
mmap followed by vme_set_attr will keep the mmap valid although it might point to a region with very
different attributes than told by vme_get_attr.
Read carefully the documented bugs of your version of the Universe chip (I or II) before modifying some
control registers or enabling write posting on slave images. Some of the bugs can lead to fatal bus
53
deadlocks or no workaround has been implemented by the driver because it seemed too complex, like the
problems of Universe revision I with bus errors on write posted cycles.
Disabling an interrupt in a device does not necessarily mean that the interrupt handler will not be invoked,
because the interrupt line may have been activated and the Universe may be acquiring the interrupt
vector at the time the access to mask the interrupt is attempted. This means that interrupt handlers must
be written to handle this case (they may be as simple as reading an in memory flag telling that it has to
ignore the interrupt and return immediately). This is especially true when posted writes are enabled since
the window for this situation to happen becomes considerably longer.
The same applies when unregistering a driver: the interrupts must first be masked before
vme_unregister_device is called, but there are scenarios where the interrupt Universe interrupt handler
might obtain the vector of an interrupt which has been freed. This situation is not easy to handle properly
in all cases, the Universe driver will simply ignore this interrupt, but if the same vector is fetched again
within a too short amount of time, it will decide that the interrupt line is stuck, issue a message and mask
the corresponding interrupt line forever. The best solution is to take steps to prevent this by either
performing a read access to a VME device after writing the interrupt mask (this flushes the write posting
queue in the Universe) or using vme_safe_access to disable the interrupts.
2.4.9. Remaining problems
The RMW cycle ioctl is still bound to change and is very likely Universe specific, given the semantics of
the special cycle generator.
If the DMA timeouts, the VME Bus is possibly completely locked up, the only solution might be a VME bus
reset but this has been neither tested nor implemented.
Some people might like to be able to prioritise DMA operations. This has not been implemented for now.
2.4.10. Unsupported Universe features
•
Universe II specific features, this includes location monitors, mailboxes, semaphores. These are
designed to be used in multiple master VME systems. The only multi master feature currently
supported is the capability of performing RMW cycles. ADO cycles are not supported either although
they are fairly easy to add.
•
Generating interrupts by software on the VME bus, this is another multi master feature which is
implemented in a much more flexible way in the Universe II than Universe I.
•
System wide functions: handling ACFAIL and SYSFAIL interrupts, bus isolation, and other
miscellaneous obscure features. Reset is allowed at driver initialisation but disabled because it fires
back and resets the whole system on boards used for development, it is too dangerous to allow it at
any other time when drivers are expecting interrupts or DMA is in progress.
•
Handling of bus errors other than through the safe accesses (for example the error logs on posted
writes).
•
User AM Codes, they would be quite easy to add in the current framework if needed, however.
•
By definition, anything else which has not been explicitly stated as supported is unsupported.
54
Chapter 3. OS-9 part
3.1. OS9, Installing and Configuring the BSP
3.1.1. Hardware and Software Requirements
To use the BSP for BAB 760, you must have a PC with Windows 9x or Windows NT and a complete
installed developement environment, based on the board level solution v3.0 from Microware.
To boot the target from ethernet, you also need a BOOTP server. The BOOTP server is not supplied by
Eltec.
3.1.2. First Steps
3.1.2.1. Updating the Firmware
To update the firmware you must use the U-Boot monitor. To do this, first the new release of the firmware
must be loaded within the RAM, for example with a bootp server:
=> bootp
RESET
MII: Unknown link-foo! 0
gal_enet0: Waiting for link up..
gal_enet0: OK!
gal_enet0: gt6426x eth device 0 init success
BOOTP broadcast 1
ARP broadcast 1
TFTP from server 192.168.2.51; our IP address is 192.168.2.188
Filename 'o:\tftpboot\../tmp\u-boot020-bab760.bin'.
Load address: 0x1000000
Loading: ##############################################
done
Bytes transferred = 232636 (38cbc hex)
RESET
=>
After this you must erase the old version within the EPROM:
=> erase fe000000 fe03ffff
Erase Flash from 0xfe000000 to 0xfe03ffff
... done
Erased 4 sectors
=>
Now the new release of the firmware can be copied to the EPROM:
=> cp.b 1000000 fe000000 40000
Copy to Flash... done
=>
It will be a good idea to check the content of the area in the EPROM, which will be erased:
=> md fe000000
fe000000: 27051956
fe000010: 20284a75
fe000020: 31323a30
fe000030: 00000000
552d426f
6c203233
303a3030
00000000
6f742030
20323030
29000000
00000000
55
2e322e30
33202d20
00000000
00000000
'..VU-Boot 0.2.0
(Jul 23 2003 12:00:00).......
................
fe000040:
fe000050:
fe000060:
fe000070:
fe000080:
fe000090:
fe0000a0:
fe0000b0:
fe0000c0:
fe0000d0:
fe0000e0:
fe0000f0:
=>
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
................
................
................
................
................
................
................
................
................
................
................
................
3.1.2.2. Base Configuration of the Galaxy
To use the galaxy within the right size of the VME windows you must set the size first. The chip supports
four sizes:
Table 3.1. values to choice the Vsize of the VME window
value
selected size
0
1 GB
1
512 MB
2
256 MB
3
128 MB
To select the right size, you must set the environment variable 'galaxy' to the value for this size, save the
environment and reset the system. For example: to open a VME window for 1GB, the variable g'galaxy'
must be set to the value '0'.
=> setenv galaxy 0
=> saveenv
Saving Environment to NVRAM...
=>
The default setting is 1GB.
3.1.3. Building a ROM Image
The OS-9 ROM image contains several files and modules. To simplify the process of loading and testing
OS-9, the ROM image is generally divided into two parts: coreboot This file contins the low-level modules
which are needed to configure the board and to load OS-9 bootfile The bootfile contains all high-level
modules which are needed to start and use OS-9 rom rom contains all coreboot and bootfile and must be
loaded on the
This files can be generated in several ways: With the makefiles, which comes with the BSP and with the
configuration wizard
3.1.3.1. Generating coreboot, bootfile and rom using the os9make-utility
To generate the files coreboot and, bootfile and rom, only you must call the os9make-utility from the
command line. To do this, you must be in the root of the BSP, for example
<MWOS>/OS9000/603/PORTS/BAB760
56
3.1.3.2. Generating coreboot, bootfile and rom using the Configuration Wizard
It is recommended, to start the configuration wizard in the wizard mode. So you see all necessary parts to
configure the files coreboot, bootfile and rom.
3.1.3.2.1. Coreboot Related Settings
3.1.3.2.1.1. Define Debugger
To use debugger, you must activate the button for RomBug or Remote. To activate the remote debugger,
you must select the connection (Ethernet for a connection via ethernet or Slip for a connection via the
serial ports). If no debugger shall be used, you can select None.
57
The checkbutton "`Enter Debugger On Power Up"' is not need, because this feature can be select with
the on-board configuration.
3.1.3.2.1.2. Low-Level Ethernet Setup
To use the remote debugging with ethernet, you must set up the necessary parameters for the ethernet
connection in this dialog.
58
3.1.3.2.1.3. Slip Setup for Remote Debugging
To use the remote debugging with a slip connection, you must set up the necessary parameters for the
slip connection in this dialog.
59
3.1.3.2.1.4. Define ROM Ports
In this dialog you can define the settings for the serial console port
60
3.1.3.2.1.5. Define Other Boot Options
Here you can activate additional options. It is not recommended to activate the checkmarks for Auto Boot,
because this option covers the on-board configuration for the auto boot. It is also not recommended to
activate the Boot embedded OS-9000 in-place, because the system runs to slowly in this case. To
activate a ROMbased OS-9 use Copy embedded OS-9000 to RAM and Boot
61
3.1.3.2.1.6. IDE Booter
To boot from an IDE disk, activate 'add to menu'. The IDE disk is at the secondary bus, the PCMCIA disk
is connected to the primary bus
62
3.1.3.2.1.7. SCSI Booter
To boot from a SCSI disk, activate 'add to menu' and select the ID of the SCSI boot hard disk.
63
3.1.3.2.2. Bootfile Related Settings
3.1.3.2.2.1. Define /term Port
In this dialog you can define the settings for the serial system device port
64
3.1.3.2.2.2. RAM Disk
If a RAM disk is needed, it can be configured in this dialog.
65
3.1.3.2.2.3. IDE Driver
To access the IDE drive in the high-level OS-9, select the desired options within this dialog. The IDE drive
must contain partitions, from which one can be selected to access with the descriptor.
66
3.1.3.2.2.4. SCSI Driver
To access the SCSI drive in the high-level OS-9, select the desired options within this dialog. The SCSI
drive must contain partitions, from which one can be selected to access with the descriptor.
67
3.1.3.2.2.5. Network Setup
To setup the network, there are several steps to perform:
3.1.3.2.2.5.1. Network Interface
SPF can support multiple network interfaces. These will be separated by their descriptors. The dialog
below is used to set the desired values to the descriptors.
It is recommended to set the values in this dialog to the Address 0.0.0.0, because the IP address will be
set in the on-board configuration. To activate the on-board configuration for the ethernet settings, refer
section 7.
68
After pressing the button to go to the next dialog, the following warning will appear:
This dialog should be answered with "yes".
3.1.3.2.2.5.2. DNS Configuration
This configuration depends on your internal network.
69
3.1.3.2.2.5.3. Gateway
The information about the available gateways must be stored here.
70
3.1.3.2.2.5.4. SPF Setup
It is recommended to activate the inet daemon only. If a connection to an other Host with NFS needed,
then the NFS connection can be started too.
71
3.1.3.2.2.6. Init Options
This dialog contains the additional options like the used shell, the default drive, .
72
3.1.3.2.3. Build Images
The dialog to build the images is the last dialog. There are some further options, which can be set:
73
Before leaving this dialog, the build must be checked and performed by pressing the buttons "check" and
"build". Otherwise the message
will be shown.
3.1.3.2.4. Additional Settings
Some dialoges don't appear in the wizard mode. These will be described here:
3.1.3.2.4.1. ROM Memory List
The ROM memory list defines some search areas to locate the low-level modules. This dialog can be
called with Configure->Select System Type
3.1.3.2.4.2. Coreboot Options
74
This dialog is needed to add some important modules to the file coreboot:
bootcnfg_x merge specifics boot configuration files into the boot image, selectable with the hex-switch
3.1.3.2.4.3. Bootfile Options
This dialog is needed to add some important modules to the file coreboot:
sc16550 to add the serial driver
watchdog to enable the watchdog during the startup
75
SSM to enable the memory management for user state modules
Cache to enable the memory management for system state modules
Ticker to enable the ticker
using Systeminfo to make the system information available to OS-9 as a memory module and complete
the network informations from the BOOTP server
using flprg to add the flash programming utility to the boot file
3.1.3.2.4.4. SPF Options
To specify the needed utilitys for SPF, they can be selected within this dialol.
3.2. Booting OS-9
There are two boot stages:
3.2.1. stage 1
The stage 1 is performed with the uboot-loader, which is loading the ROMbased OS-9 into the RAM and
starting it. uBoot can load an image from a bootp-server or from a DHCP server.
To configure uboot to load an image from a bootp-server, boot the board and abort the autoboot by
pressing any key during the countdown:
*** ELTEC Elektronik, Mainz ***
Initialising RAM
Reading SPD of SODIMM ...... OK
Activating 64 MByte.
76
U-Boot 0.2.0 (Apr 10 2003 - 13:15:06)
CPU:
750FX v2.2 @ 600 MHz
Board: ELTEC BAB760 CHRP
DRAM: 64 MB
FLASH: 8 MB
In:
serial
Out:
serial
Err:
serial
Ident: V-BAB.-760A Ser 261672 Rev 0A
Cache: L2 Cache Copy-Back mode activated.
Net:
i82559#0, i82559#1
IDE:
Bus 0: not available Bus 1: not available
Hit any key to stop autoboot: 0
=>
Now enter the boot command to load the ROMbased OS-9 via a bootp server and start the image. If the
system shall get his bootfile with the first ethernet device, you must type:
=> setenv ostype os9
=> setenv bootcmd bootp 0x40000\;
setenv bootargs
ip=\$(ipaddr):\$(serverip):\$(gatewayip):\$(netmask):\$(hostname):enet0:none\;
bootm
Important
The last four lines must be written as one line
If the system shall get his boot file with the second ethernet device, you must replace enet0 by enet1 and
so on. This entry makes possible to initialize the network interface, from which the system got its boot file,
under OS9 automatically.
Further the desired mode for the L2 cache must be set, because this depends on the usage of the board.
There are follow options:
L2CB copy-back mode this mode the cache will be used for instructions and data
L2DO data only mode this mode the cache will be used for data, not for instructions. ATTENTION: This
mode can't be used, if the code should be debugged with the ROMbug}
L2WT write-through mode through means, that every write access to the data will be written to the RAM
immediately
For example: If your main application has much code and needs a lot of data, the L2 cache should be set
to the copy back mode.
=> setenv l2cache=L2CB
After setting the environment you should save it and perform the stage 2 boot.
=> saveenv
=> bootd
3.2.2. stage 2
77
After entering 'bootd' the system performs the stage 2 boot: loading the ROMbase OS-9 image and
starting it. After starting the image, the system initializes the OS-9 structures and show the boot menu.
BOOTP broadcast 1
ARP broadcast 1
TFTP from server 192.168.2.51; our IP address is 192.168.2.188
Filename 'o:'.
Load address: 0x40000
Loading: #################################################################
#################################################################
#################################################################
#################################################################
#################################################################
#################################################################
done
Bytes transferred = 1992376 (1e66b8 hex)
## Starting application at 0x00040000 ...
OS-9 Bootstrap for the PowerPC(tm) (Edition 64)
boardCnfg: edition 0, generating module with the system information ...
boardCnfg: get system information from configuration memory
boardCnfg: error reading non volatile information:
expected CRC: -0x3106149d
calculated CRC: 0x3c39ae
-> reset to default
*** autoboot in 3 seconds; press <space> to abort ...
BOOTING PROCEDURES AVAILABLE ---------- <input>
Boot over Ethernet -------------------- <eb>
Copy embedded OS-9000 in-place -------- <bo>
Enter system debugger ----------------- <break>
Enter board specific setup utility -----<setup>
Restart the System -------------------- <q>
Select a boot method from the above menu:
To change the board specific setup call 'setup' and refere to chapter 4.1.2 on page 26
78
3.3. Board Specific Reference
3.3.1. The Boot Menu
BOOTING PROCEDURES AVAILABLE ---------- <input>
Boot over Ethernet -------------------Copy embedded OS-9000 to RAM and boot PCI View Utility ---------------------Enter system debugger ----------------Enter setup for nvRAM ----------------Restart the System --------------------
<eb>
<lr>
<pciv>
<break>
<nvram>
<q>
Select a boot method from the above menu:
Table 3.2. Supported Boot Methods
Type of Boot
Description
Boot over Ethernet
booting a image from an BOOTP server
Copy embedded OS-9000 to RAM and boot
Copy OS-9 from Flash EEPROM to RAM and
boot
79
3.4. Board Specific Modules
3.4.1. Low-Level System Modules
Table 3.3. Configuration Modiules
name of module
Description
cnfgdata
provides low-level configuration data
cnfgfunc
retrieves configuration parameters from cnfgdata
module and the on-board configuration
commcnfg
retrieves the name of the low-level auxiliary
communication port driver from the cnfgdata
module
conscnfg
retrieves the name of the low-level console driver
from the cnfgdata module
Table 3.4. Console Drivers
name of module
Description
io16550
provides console services for the 16552 UART on
the
Table 3.5. Debugging Modules
name of module
Description
cnfgdata
usedebug
is a debugger configuration module
Table 3.6. Ethernet Driver
name of module
Description
cnfgdata
xxxx
provides network driver services for the on-board
ethernet chip
Table 3.7. System Modules
name of module
Description
cnfgdata
ide
is a low-level booter to boot from an IDE hard disk
initext
is a user-customizable system intialization module
80
name of module
Description
portmenu
retrieves a list of names of the configured booters
from the ROM cnfgdata module
romcore
provides bootstrap code
romstart
resets vectors
rpciv
shows informations about the devices on the PCI
bus
Table 3.8. Timer Modules
name of module
Description
tbtimer
provides polling timer services using the tblo and
tbhi registers in the 750 processor
3.4.2. High-Level System Module
Table 3.9. Ticker
name of module
Description
tkdec
provides the system ticker based on the
ProwerPC decrementer
Table 3.10. Shared Libraries
name of module
Description
picsub
provides interrupt enable and disable routines to
handle platform specific interrupt controller issues
for device drivers. This module is called by all
drivers and should be included in your bootfile
pcisub
provides PCI library functions for the PCI bus
Table 3.11. Serial and Console Drivers
name of module
Description
sc16550
The descriptors provided for this driver are named
term, t1 and t2, and are located in the following
directory:
<BAB760>/CMDS/BOOTOBJS/DESC/SC16550
rb1003
is a device driver for IDE hard disks
Table 3.12. Ethernet Driver
81
name of module
Description
sp_gt64260
provides network driver services for the on-board
ethernet chip
Table 3.13. Common System Modules
Name of Module
Description
bootsys
provides booter services
console
provides high-level I/O hooks into low-level
console serial driver
dbgentry
provides hooks to low-level debugger server
dbgserv
is a debugger server module
exception
is a service module
genBootcnfg
to generate modules with valid informations from
the non volatile RAM to store them in the flash
EEPROM
hlproto
allows user-state debugging
ide
provids standard IDE support including PCMCIA
ATA Cards
linkSystemInformation
to access the system information under OS-9
llip
is a target-independent internet protocol module
lltcl
is a target-independent transmission control
protocol module
lludp
is a target-independent
llxxxx
provides low-level network functions
notify
to coordinate user of low-level I/O drivers in
system and user-state debugging
boardCnfg
handles the system information in the non volatile
RAM
boardSetup
to edit the settings
parser
parses key fields from the cnfgdata module and
the user parameter fields.
protoman
is a target-independent protocol module manager.
This module provides the initial communication
entry points into the protocol module stack.
restart
restarts boot process
romboot
locates the OS-9 bootfile in the on-board flash
EEPROM
rombreak
enables break option from the boot menu M
rombug
is a debugger client module
sp_gt64260
provides high-level network functions
82
3.5. additional modules from Eltec
3.5.1. non volatile information
3.5.1.1. Introduction
The non volatile RAM is used to store diverse configuration parameters. The size of this RAM is 256 Byte
and it contents is mirrored in the system information. The content of the active non volatile RAM is also
available as the memory module 'SystemInfo' under OS-9. The structure of the data is described behind
(section 6 on page 37 ()).
After power-on or a system-reset the hex switch near the bracket of the will be read, the system
information will be load from the desired source and the universe-chip will be initialized. The available
sources are:
Table 3.14. available sources
Number
source of system information
0
factory setting
1
nvRAM setting
2
reserved
3
reserved
4
reserved
5
reserved
6
reserved
7
reserved
8
datamodule bootcnfg_8
9
datamodule bootcnfg_9
10
datamodule bootcnfg_a
11
datamodule bootcnfg_b
12
datamodule bootcnfg_c
13
datamodule bootcnfg_d
14
datamodule bootcnfg_e
15
datamodule bootcnfg_f
3.6. Setup the Non Volatile Informationssetup
3.6.1. The Main Menu
In the main menu you can select a separate block to view and edit the corresponding parameters, reset
the nvram to the manufacturer settungs, read the settings from the nvRAM or write the settings back to
the nvRAM.
figure: main menu of the nvram setupMainMenu
board configuration setup:
83
-------------------------configure boot parameters .............. <boot>
configure I/O parameters ............... <io>
configure VME parameters ............... <vme>
get factory setting ................... <init>
read settings from non volatile RAM .... <read>
write settings to non volatile RAM ..... <write>
exit to core menu .......................<exit>
Select an item from the above menu: boot
The commands of the main menu are case insensitive and must be written in the full length. The
commands boot, pci and net calls submenus, the command init sets the complete nvRAM to the
manufacturer setting, read reads back the nvRAM and the command write copy the actual settings back
to the nvRAM. With exit the system goes back to the coreboot-menu.
3.6.2. The submenus
All menu entries contains submenus like the menu shown behind:
figure: the mostly used submenu
show parameters ..........................
change parameters ........................
set local part to factory setings ........
read local part from non volatile RAM ....
write local part to non volatile RAM .....
return to main menu ......................
<show>
<change>
<init>
<read>
<write>
<ret>
Select an item from the above menu:
The commands init, read and write has the same meaning like the commands in the main menu, but they
works only with the parameters, which can be edit in the respective submenu. The command return is
used to go back to the mainmenu, show shows the actual setting and change is used to edit the settings.
If an value shall be changed, a help line come out under the value. It includes some hints how the desired
setting shall be entered. This line shows the useable keys and, if necessary, the area of values, which
can be used.
3.6.3. Boot parameters
The boot-parameters consist of two parts --- the first three entries are global settings for all boot devices,
the last entries depend on the selected boot device.
The global entries are bootdevice, autoboot-delay and bootflags. The entries, which are depend of the
boot device, will be explained behind.
figure: content of the ethernet boot parameters
boot device
: embedded OS-9000 direct
auto boot delay for ELTEC
: 3
boot flags
:
- start rombug before coreboot menu ( )
- enable autoboot
( )
- enable watchdog
( )
3.6.4. select the boot device
84
The boot device can be selected with the SPACE-key. Each hit selects an other device, a hit to the
return-key ends the selection. The order of the boot devices is:
embedded OS-9000 direct
booting the kernel direct from load address ethernet
BootP via ether-network embedded OS-9000 after load
copies the kernel from ROM to RAM and boot
The default value is 'embedded OS-9000 direct'. The other values are for special purposes only.
3.6.5. select the autoboot delay for eltec
The autoboot delay for eltec is a time, in which the boot process can be stopped by a hit with the
space-key. So this parameter is useable to delay the boot process of the . The time can be between 0 or
3600 seconds.
3.7. select the boot flags
3.7.1. start rombug before coreboot menu
The state of the debugger can be switched by pressing the SPACE-key. If the debugger is enabled, it will
be called before showing the coreboot menu or booting the operating system. For further details about
the rombug, please read the appropriate manual.
3.7.2. enable the autoboot
To toggle the state of the autoboot, press the SPACE-key. If the autoboot is enabled, the system count
the autoboot time before it shows the boot menu.
3.7.3. enabling the watchdog
This option allows to activate the watchdog with the utility enableWatchdog on OS-9. So there no bootfile
must be change to enabling the watchdog or not.
To add the utility enableWatchdog to the bootfile, refer section 1.5.6 on page 13.
3.7.4. direct boot depend entries This bootdevice needs no further
parameters
3.7.5. ethernet depend entries
The ethernet boot has one specific parameter, called netboot retry.
3.7.5.1. select the netboot retry
With the netboot retry the numbers of bootp-retrys can be selected. The value can be between 0 or 20
tries.
3.7.5.2. loaded boot depend entries
To boot an embedded OS9, one specific parameter is need, called base address.
85
figure: content of the RAM boot parameters
boot device : embedded OS-9000
auto boot delay for ELTEC: 3
boot flags : 3
- start rombug before coreboot menu ( )
- enable autoboot ( )
- enable watchdog ( )
base address for romboot : 0x0
3.7.5.2.1. select the base address for ROMboot
This address means the start address of the kernel in the rom. The address can be set with decimal or
hexadecimal numbers. If hexadecimal numbers are used, the value must start with '0x'.
3.7.5.3. I/O parameters
The I/O parameters contains the configuration for the serial devices, printer and network interfaces
figure: content of the I/O parameters
com0: 9600 baud, 8 data bit , no parity , 1 stop bit , no handshake com1: 9600 baud, 8 data bit , no parity
, 1 stop bit , no handshake com2: 9600 baud, 8 data bit , no parity , 1 stop bit , no handshake com3: 9600
baud, 8 data bit , no parity , 1 stop bit , no handshake lpt : address 0x0 , mode normal net0:
0x0.0x0.0x0.0x0 subnet mask 0x0.0x0.0x0.0x0 gateway 0x0.0x0.0x0.0x0, 10 Mb/s , half duplex net1:
0x0.0x0.0x0.0x0 subnet mask 0x0.0x0.0x0.0x0 gateway 0x0.0x0.0x0.0x0, 10 Mb/s , half duplex
3.7.5.3.1. select the serial settings
3.7.5.3.1.1. The ethernet IP address
This address can be writen like a normal string. If the address is '0.0.0.0', the ethernet address of the
board will be taken from an other source, in dependence of the boot device: ethernet. The address will be
got from the a bootp-server all others The address will be taken from the datamodule cnfgdata
3.7.5.3.1.2. The gateway IP address
This address can be writen like a normal string.
3.7.5.3.1.3. The subnet mask
half duplex selects half duplex format
full duplex selects full duplex format
3.7.5.3.1.4. The broadcast IP address
86
3.7.5.3.2. select the ethernet speed
figure: content of the net parameters
ethernet IP
gateway IP
subnet mask
broadcast IP
:
:
:
:
0x0.0x0.0x0.0x0
0x0.0x0.0x0.0x0
0x0.0x0.0x0.0x0
0x0.0x0.0x0.0x0
3.7.5.3.3. The ethernet IP address
This address can be writen like a normal string. If the address is '0.0.0.0', the ethernet address of the
board will be taken from an other source, in dependence of the boot device: ethernet. The address will be
got from the a bootp-server all others The address will be taken from the datamodule cnfgdata
3.7.5.3.4. The gateway IP address
3.7.5.3.5. The subnet mask
half duplex selects half duplex format
full duplex selects full duplex format
3.7.5.3.6. The broadcast IP address
3.7.5.4. Store and select different nvRAM configurations
To store different nvRAM configurations, the actual nvRAM setting can be saved with the genbootcnfg.
This utility generates a data module, that contains the current system informations, which are used to
initialize the system. This module must be saved toat the host and merged to the file coreboot, behind the
module cnfgdata. for example:
genbootcnfg -n=14 ;* generate the datamodule 'bootcnfg_e'
save bootcnfg_e ;* store datamodule to disk
After transfering the file bootcnfg_e to the host (for example to the directory /os9000/603/ports/BAB
760/cmds/bootobjs), it must be included to the file coreboot. It must be insert directly after the module
cnfgdata in the file coreboot.ml, reacheable under
Sources=>PORT=>CoreBoot(coreboot.ml)[MASTER]
insertBootCnfg_10
If a datamodule shall be generated by the genbootcnfg-utility, a module with the same name is not be
allowed to exist in the flash EEPROM. In the other case, the setting will not be saved to the datamodule.
3.7.6. enableWatchdog
This utility enables the watch dog on the BAB-760. It can be activate in the Configuration Wizard and
must be called during the startup. After enabling the watchdog, it mus be ensured, that the watchdog is
87
retriggered every second
88
89
3.8. Structure of the non volatile System Information
3.8.1. The Main Structure
The non volatile information is needed to start the . It contains parts for several operating systems, which
are divided into parts with the initialization parameters for the devices:
Table 3.15. Structure of the non volatile
informationSystemInformation.MainStructure
content of the block
offset
size
user defined data
0x0000
0x1000
OS-9 specific area
0x1000
0x0800
U-Boot specific area
0x1800
0x0400
copy of revision EEPROM
0x1c00
0x0100
reserved for future extensions
0x1d00
0x0100
VxWorks specific area
0x1e00
0x01e0
reserved for RTC
0x1fe0
0x0020
As described above, the OS-9 specific area contains the following informations:
Table 3.16. As described above, the OS-9 specific area contains the following
informations:
content of the block
offset
size
boot parameters
0x000
0x020
I/O settings
0x020
0x100
VME settings
0x120
0x200
miscellaneous parameters
0x320
0x020
reserved for future extensions
0x340
0x4c0
3.8.2. OS-9 Specific Informations
3.8.2.1. Boot Parameters
Table 3.17. network (80 bytes)
name
offset
size
description
checksum
0x000
1 long
checksum of this block
version
0x004
1 short
version of this block
revision
0x006
1 short
revision of this block
address
0x008
1 long
address of boot image
delay
0x00c
1 short
autoboot delay
90
name
offset
size
description
bootdevice
0x00e
1 byte
ethernet or ROM
bootflag
0x00f
1 byte
autoboot, rombug
enable, watchdog
enable
retry
0x010
1 byte
ethernet boot retry
reserve
0x011
15 byte
reserved for future
extension
name
offset
size
description
checksum
0x000
1 long
version
0x004
1 short
revision
0x006
1 short
3.8.2.2. I/O Settings
Table 3.18. I/O Settings
Table 3.19. serial controllers (4x8 bytes)
name
offset
size
description
baud
0x008
1 long
baudrate
format
0x00c
1 byte
bits per character,
number of stopbits,
parity bit
flow
0x00d
1 byte
handshake (no,
software or hardware)
reserve
0x00e
2 byte
reserved for future
extension
name
offset
size
description
address
0x028
1 long
adress of the parallel
port
mode
0x02c
1 byte
adress of the parallel
port
reserve
0x02d
3 byte
reserved for future
extension
Table 3.20. parallel port
Table 3.21. network controllers (2x bytes)
91
name
offset
size
description
ethernet
0x030
16 byte
ethernet IP in IPv6
gateway
0x040
16 byte
gateway IP in IPv6
subnetmask
0x050
16 byte
subnet mask IP in IPv6
speed
0x060
1 byte
speed for ethernet
controller
format
0x061
1 byte
format for ethernet
controller
reserve
0x062
14 byte
reserved for future
extension
name
offset
size
description
reserve
0x0a8
80 byte
reserved for future
extension
name
offset
size
description
checksum
0x000
1 long
version
0x004
1 short
revision
0x006
1 short
lsi_x
0x008
24 long
windows to access VME
bus from host
reserved_1
0x088
24 long
reserved for future
extension
pci_id
0x108
1 long
PCI Configuration
Space ID
pci_csr
0x10c
1 long
PCI Configuration
Space Control/Status
pci_class
0x110
1 long
PCI Configuration
Space Class
pci_misc0
0x114
1 long
PCI Configuration
Space Miscellaneous 0
pci_misc1
0x118
1 long
PCI Configuration
Space Miscellaneous 1
scyc_ctl
0x11c
1 long
Special Cycle Control
Register
scyc_addr
0x120
1 long
Special Cycle PCI Bus
Address Register
scyc_en
0x124
1 long
Special Cycle
Swap/Compare Enable
Table 3.22. common
3.8.2.3. VME Settings
Table 3.23. VME Settings
92
name
offset
size
description
Register
scyc_cmp
0x128
1 long
Special Cycle Compare
Data Register
scyc_swp
0x12c
1 long
Special Cycle Swap
Data Register
lmisc
0x130
1 long
PCI Miscellaneous
Register
slsi
0x134
0x134
Special PCI Target
Image Register
reserved_2
0x138
8 long
reserved for future
extension
lint_en
0x158
1 long
PCI Interrupt Enable
Register
reserved_3
0x15c
3 long
reserved for future
extensions
vint_en
0x168
1 long
VMEbus Interrupt
Enable Register
reserved_4
0x16c
1 long
reserved for future
extensions
vint_map1
0x170
2 long
VMEbus Interrupt Map 1
Register
vint_map2
0x174
1 long
VMEbus Interrupt Map 2
Register
mast_ctl
0x178
1 long
Master Control Register
misc_ctl
0x17c
1 long
Miscellaneous Control
Register
reserved_5
0x180
4 long
reserved for future
extensions
vrai_ctl
0x190
1 long
VMEbus Register
Access Image Control
Register
vrai_bs
0x194
1 long
VMEbus Register
Access Image Base
Address Register
reserved_6
0x198
2 long
reserved for future
extensions
vcsr_clr
0x1a0
1 long
VMEbus CSR Bit Clear
Register
vcsr_set
0x1a4
1 long
VMEbus CSR Bit Set
Register
reserved_7
0x1a8
42 long
reserved for future
extensions
3.8.2.4. Miscellaneous Parameters
93
Table 3.24. Miscellaneous Parameters
name
offset
size
description
checksum
0x000
1 long
version
0x004
1 short
revision
0x006
1 short
l2cache
0x008
1 byte
desired L2 cache mode
reserve
0x009
23 byte
reserved for future
extension
3.8.3. Content of the Revision EEPROM
Table 3.25. Miscellaneous Parameters
name
offset
size
description
magic
0x000
8 byte
Magic number
revision
0x004
1 short
Revision of structure
size
0x006
1 short
Size of CRC area
CRC
0x008
1 long
CRC sum of CRC area
boardRevision
0x00c
16 byte
Board Revision
Information
optionRevision
0x00e
64 byte
Option Revision
Information
serial
0x00f
8 byte
Serial Number of the
Board
nodeID
0x010
8 byte
Ethernet Node Address
revisionCodes
0x010
14 byte
Revision Codes
categoryCodes
0x010
2 byte
Category Codes
text
0x010
128 byte
Text field
Table 3.26. - internal parameters (8 bytes)
name
size
checksum
4 bytes
revision
2 bytes
version
2 bytes
3.8.4. - network (80 bytes)
Table 3.27. - network (80 bytes)
94
description
name
size
description
default IP address
16 byte
IPv6-Format
default Gateway address
16 byte
IPv6-Format
default Gateway address
16 byte
IPv6-Format
default Subnet mask
16 byte
IPv6-Format
default Broadcast address
16 byte
IPv6-Format
reserve
16 byte
reserved for future extension
- bootparameters (16 bytes)
This struture needs 120 bytes.
95
96
Appendix A. Appendix
A.1. Description of On-board Devices
This chapter describes how the on-board devices are accessed by operating system drivers. When an
operating system, such as OS-9 and VxWorks, is used, there should be no need to address these
devices with user-written code.
Table A.1. BAB-760 CPU Addressmap
Start
End
Size
Description
$0000.0000 - $3FFF.FFFF
1 GByte
Local RAM
$4000.0000 - $7FFF.FFFF
1 GByte
PCI0 Memory Space (PMC)
$8000.0000 - $EFFD.FFFF
2 GByte - 256 PCI1 Memory Space
MByte - 128 (PMCE, VME)
KByte
Select Note
$EFFE.0000 - $EFFF.FFFF
128 KByte
reserved for Stack in Cache
$F000.0000 - $F0FF.FFFF
16 MByte
reserved
$F100.0000 - $F100.FFFF
64 KByte
Discovery Internal Registers
$F101.0000 - $F1FF.FFFF
1 MByte - 64
KByte
reserved
$F110.0000 - $F11F.FFFF
1 MByte
COM3, COM4, PLD
CS0
$F120.0000 - $F12F.FFFF
1 MByte
NvRAM/RTC
CS1
$F130.0000 - $F13F.FFFF
1 MByte
Super I/O
CS2
(2)
$F140.0000 - $F14F.FFFF
1 MByte
PCI0 I/O Space (PMC)
$F150.0000 - $F15F.FFFF
1 MByte
PCI1 I/O Space (PMCE,
IDE)
$F160.0000 - $FBFF.FFFF
-
reserved
$FC00.0000 - $FDFF.FFFF
32 MByte
64 x System Flash (8 bit)
CS3
(3)
$FE00.0000 - $FFFF.FFFF
32 MByte
4 x User Flash (16 bit)
BootCS
32 MByte
CS3
32 MByte
BootCS
32 MByte
CS3
(3)
32 MByte
halves swapped
BootCS
(4)
J1001 1-2 open,
J1001 1-2 open,
J1001 1-2 closed,
(1)
J1001 3-4 open:
J1001 2-3 closed
(default):
(3)
J1001 2-3 open:
(1) Every register of the UART occupies 8 consecutive bytes in the address space. UART and PLD are
distinguished by A8 (A8 = 0 is UART, A8 = 1 is PLD).
(2) Every register of the Super I/O occupies 8 consecutive bytes in the address space. The address of a
specific register is $F130.0000 plus eight times the normal address of that register. E.g. if the address of
the printer port is set to $278 it has to be accessed at $F130.13C0.
97
(3) This region allows programming of the onboard 16 bit Flash device even if the auxilary 8 bit device is
selected for booting.
(4) This region allows to hold two bootable images in the User Flash (see also Table 1.18).
98
Table A.2. PCI IDSEL and Interrupt Routing
Bus
IDSEL
ID
INTA
INTB
INTC
INTD
Device
0
AD(16)
6
GPP[26] GPP[27] GPP[26] GPP[27] PMC1
0
AD(17)
7
GPP[27] GPP[26] GPP[27] GPP[26] PMC2
1
AD(14)
4
GPP(30) -
-
-
IDE
1
AD(15)
5
GPP(28) -
-
-
PMCE0
1
AD(16)
6
GPP(28) -
-
-
BALV SMI / PMCE1
1
AD(17)
7
GPP(28) -
-
-
BALV Network1
1
AD(18)
8
GPP(28) -
-
-
BALV Network2
1
AD(19)
9
GPP(31) GPP(29) GPP(28) GPP(30) VME
A.3. Interrupts
All external interrupts are routed via the General Purpose Port of the Discovery. All interrupts need to be
level sense.
Table A.3. Interrupts
Port
Source
Device
Sense
GPP(12)
Super I/O IRQ1
Keyboard
Low
GPP(13)
Super I/O IRQ4
COM1
High
GPP(14)
Super I/O IRQ3
COM2
High
GPP(15)
Super I/O IRQ12
Mouse
Low
GPP(16)
UART Channel B
COM4
High
GPP(17)
UART Channel A
COM3
High
GPP(24)
Super I/O IRQ7
LPT
High/Low
GPP(25)
RTC/Watchdog
GPP(26)
PCI0 INTA
PMC1 INTA, INTC,
PMC2 INTB, INTD
Low
GPP(27)
PCI0 INTB
PMC1 INTB, INTD,
PMC2 INTA, INTC
Low
GPP(28)
PCI1 INTA
PMCE/VME INTA
Low
GPP(29)
PCI1 INTB
PMCE/VME INTB
Low
GPP(30)
PCI1 INTC
PMCE/VME INTC,
IDE
Low
GPP(31)
PCI1 INTD
PMCE/VME INTD
Low
Note
(1)
Low
(1) LPT interrupt may also be negative edge sense via PLD for some printer modes that are fixed to edge
sense. The PLD incorporates a flipflop that convertes a negative edge of the IRQ7 to a low level at
GPP[24]. This flipflop must be set by the interrupt service routine for each interrupt.
99
A.4. PLD Register
There are five register in the PLD. Three for extension of the Discovery timers 0-2, one for controlling the
LPT interrupt, and one for FLASH write protect.
Table A.4. PLD Addressmap:
Address
Register
$F110.0100
Timer 0 Extension
$F110.0101
Timer 1 Extension
$F110.0102
Timer 2 Extension
$F110.0103
LPT Interrupt Control
$F110.0104
Flash Write Protect
$F110.0113
same as LPT Interrupt Control but also
sets LPT IRQ flipflop after read
Table A.5. Timer 0-2 Extension Register Layout:
D7
D6
D5
D4
D3
D2
D1
D0
-
-
-
-
-
-
0
0
external or internal clock, no output (default)
-
-
-
-
-
-
0
1
external clock, terminal count output
-
-
-
-
-
-
1
0
external clock, square wave output
-
-
-
-
-
-
1
1
internal clock, square wave output
Before using the timer extensions the pins of the LPT must be tristated!
Using external clock requires setting of bit 2 of the corresponding Timer Control register of the Discovery.
When external clock is selected the timer/counter counts positive edges of the external clock (up to 16
MHz) that are qualified by a low of the associated external count enable signal. When terminal count
output mode is selected the timer/counter outputs low for one external clock period after the timer/counter
reaches zero. In square wave output mode the timer/counter output toggles every time the timer/counter
reaches zero.
100
Table A.6. LPT Interrupt Control Register Layout:
D7
D6
D5
D4
D3
D2
D1
D0
LPT Interrupt Mode Select
1 GPP[24] follows IRQ7 output of SuperI/O (default)
0 a negative edge of IRQ7 resets GPP[24]
LPT Interrupt Status
0 LPT interrupt active
1 LPT interrupt inactive
Table A.7. Flash Write Protect Register Layout:
D7
D6
D5
D4
D3
D2
D1
D0
0 Write to FLASH enabled
1 Write to FLASH disabled (reset state)
101
A.5. Initialization/User LED
The RUN LED is a dual color LED. The yellow LED is switched on when the board is reset and off when
the firmware is able to use the serial console. The user can also switch it on by writing to address
$F110.0128 and off by writing to address $F110.0120.
A.6. GPIO Use
The GPIOs of the Super-I/O are used for the following purposes:
Table A.8. GPIO Usage
Name
Type
Function
GPIO10
-
not used
GPIO11
-
not used
GPIO12
-
not used
GPIO13
O
trigger soft Reset
GPIO14
-
not used
GPIO15
-
not used
GPIO16
-
not used
GPIO17
-
not used
GPIO20
O
VMEbus size configuration bit 0
GPIO21
O
VMEbus size configuration bit 1
GPIO22
-
not used
GPIO23
-
not used
GPIO24
I
HEX Switch LSB
GPIO25
I
Hex Switch
GPIO26
I
Hex Switch
GPIO27
I
Hex Switch MSB
GPIO13 (Soft Reset) can be used to reset the board by setting it low. This has the same effect as
pressing the reset button on the frontpanel.
GPIO20 and GPIO21 determine which size the VMEbus interface requests from the PCI configuration
software for PCI memory space. All addresses that are used to access the VMEbus must fit into this
window. If a size other than 128 MByte is desired GPIO20 and GPIO21 must be programmed before PCI
configuration according the following Table:
A.6.1. GPIO Use
The GPIOs of the Super-I/O are used for the following purposes:
Table A.9. VMEbus Window Size
102
GPIO21
GPIO20
Size
1
1
128 MByte (default)
1
0
256 MByte
0
1
512 MByte
0
0
1 GByte
Table A.10. Timer Extension AC Specification
Clock Frequency
16 MHz max.
Clock Time low
30 ns min.
Clock Time high
30 ns min.
Enable Setup
10 ns min.
Enable Hold
1 ns min.
Clock to Output
1 ns min. - 10 ns max.
All levels are TTL levels (5V tolerant).
103
A.8. Known Problems
A.8.1. I2C Deadlock
When the I2C controller of the Marvell Discovery is reset while a I2C transfer is in progress it may happen
that the slave drives the data line low. This blocks the bus. Unfortunately the Discovery is not able to
recover from this state because it refuses to drive the clock as long as the data line is low. Also the
Discovery offers not enhough control of the clock line that software can recover. As a result of this the
board will hang when it tries to initialize the memory (tries to read SPD information of the memory
module). The only way to recover is to remove power from the board.
A.8.2. PCI Ordering
Due to the highly buffered structure of the Discovery unwanted data inconsistencies may happen. The
scenario that is most likely to happen with the BAB-760 is the following:
•
A PCI device writes data to the memory of the BAB-760.
•
The PCI device asserts an interrupt to the CPU.
•
When the CPU enters the interrupt service routine the data may still reside in one of the buffers of the
Discovery.
To overcome this problem the Discovery supports two mechanisms described in Chapter "10.
Synchronization Barriers and PCI Ordering" of the Discovery manual. Normally it is sufficient to perform a
PCI I/O read of some status register for synchronization (Basic Sync Barrier).
A.8.3. Mixed EIDE/SATA Operation
When one EDIE and one SATA drive is attached to the ADAP-760 the ATA EXECUTE DEVICE
DIAGNOSTIC command reports wrong results. The PDIAG signal can't be passed from EIDE to SATA
drives and vice versa because they reside on different segments of the cable. This is normally not an
problem because all other commands work properly.
A.8.4. Caching of the FLASH EPROM
Due to the limited capabilities of the burst interface of the Discovery it is not possible to perform burst
accesses to the FLASH EPROMs. As a result of this the FLASH EPROMs can't be cached.
104
Index
B
Bootp server, 33
/etc/bootptab, 34
/etc/inetd.conf, 34
/etc/services, 33
tftpboot directory, 34
S
Serial connection, 31
minicom setup, 31
U
U-Boot
common commands, 36
environment, 37 , 39
flash rom mapping, 40
standalone boot, 41
update, 42
105

hardware documentation

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