SystemC and Mixed-Signal Simulation Concepts

Transcription

Karsten Einwich,
Christoph Clauss,
Peter Schwarz
Fraunhofer IIS Design Automation Dept.
Dresden
4. European SystemC Users
Group Meeting
Copenhagen 2001
1
IIS
Fraunhofer Institut
Integrierte Schaltungen
SystemC - models in standard M/S-simulators
SystemC extensions for telecommunication
RF-extensions
SystemC extension for automotive
Conclusions / Observations
2
IIS
Fraunhofer Institut
SystemC - models in standard M/Ssimulators
Motivation
User models
Analog
Transistor circuits, A/D-, D/Aconverter, Amplifier, Filter,
Thresholds, Driver, ...
Saber, AdvanceMS,
Matlab/Simulink, ...
Digital
Controller, Interfaces, Logic,
State Machines, ...
SystemC
Embedding in tools on
different platforms
Embedding into different tools
IP-protection
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Synchronization principle
Event driven
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7
11
MS-simulator runs ahead
Requirements MS-simulator:
• C-interface
• Foreign block must be
scheduleable by time and
event
tMS-simulator
1
2
4
6
5
Restriction:
• No zero-delay (delta cycle)
iteration possible
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9
10
12
13
14
tSystemC
Event occurred
Simulation step
Event scheduled
Synchronization / event
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Implementation
Principle:
Problems:
Mixed-Signal Simulator
SystemC next event information
C-Interface
Dynamic simcontext creation/destroy
Linking
SytemC-model
Signal update
*.dll, *.so, *.o
Tool/platform specific layer
Entity/Type exploration
Synchronization/conversion layer
User model
SystemC - library
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SystemC extensions for
telecommunication
Motivation Mixed-Signal extensions
hook
(telephone receiver)
Σ∆
KV2W
pofi
DSP
Interfaces
algorithm
Control
Controller
Protection net
Σ∆
Digital circuit
KIT
prefi
Mixed-Signal circuit
Analog circuit
Subscriber
red: linear electrical
magenta: linear DAE’s
blue: dataflow
green: digital (SystemC)
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Mixed-Signal extensions
telecommunication
Including via Dataflow
SystemC 2.0
Using optimized dataflow
scheduler for static cluster
Static multi rate
dataflow
Remote
process call
Simple and effective
synchronization mechanism
Kahn Process
networks
Mixed Signal extensions
Frequency
domain
Event driven
Linear DAE’s
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Modeling capabilities of a linear solver
telecommunication
Linear behavior models:
Transfer function (Hp, Lp, ...)
State space systems
Pol-Zero
Ax· + Bx + q ( t ) = 0
Solvers:
Euler backward
Trapezoidal
Linear networks
R,L,C,V,I, ...
Linear transformer models
Line models, ...
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Frequency domain simulation
telecommunication
Mixed-Signal-Systems specified in frequency domain
Networks / linear differential
equation
Solving equation system in frequency domain
Dataflow blocks
1. Complex arithmetic
2. Optional frequency domain implementation
Digital filter (SystemC event
driven)
Optional frequency domain implementation
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Dataflow block with SystemC in-port
telecommunication
SDF_MODULE(pofi_pcb)
{
sdf_inport
<double> INPUT;
sc2sdf_inport<bool>
ADSL_LITE;
sdf_outport <double> OUTPUT;
//dataflow inport
//SystemC inport
//dataflow outport
double FG0, FG1, K, h;
//parameters
void sig_proc() {
if(ADSL_LITE)
OUTPUT=LTF(A1,B1,S,ltf_id1,INPUT);
else
OUTPUT=LTF(A0,B0,S,ltf_id0,INPUT);
}
SDF_CTOR(pofi_pcb);
LTF_ID ltf_id0, ltf_id1;
vector<double> A0,A1, B0,B1, S;
void attributes() {
ADSL_LITE.h=h;
}
};
pofi_pcb
//port attributes for synchronization
//h sample time
void init() {
double wpre0;
wpre0=2.0*M_PI*FG0;
A0(0)=1.0;
A0(1)=1.41/wpre0;
A0(2)=1.0/wpre0/wpre0;
B0(0)=K;
}
double wpre1;
wpre1=2.0*M_PI*FG1;
A1(0)=1.0;
A1(1)=1.41/wpre1;
A1(2)=1.0/wpre1/wpre1;
B1(0)=K;
INPUT
(static dataflow)
OUTPUT
(static dataflow)
ADSL_LITE
(SystemC event driven)
K
H ( s ) = ------------------------------------------------------------------2
1
1, 41
1 + ------------------------ s + ---------------- s
2
2πFG
( 2πFG )
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Frequency domain implementation
telecommunication
SDF_MODULE(delay)
{
sdf_inport<double> inp;
sdf_outport<double> outp;
void sig_proc() {
outp=inp;
}
void ac_domain() {
outp.freq.ampl=inp.freq();
outp.freq.deg =delays*inp.T() * 360 * freq;
}
sdf_para<unsigned long> delays;
sdf_para<double>
init_val;
void defaults() {
delays =1;
init_val=0.0;
SDF_CTOR(delay);
};
}
db/grd
void attributes() {
outp.delay=delay;
}
0
void init() {
for(unsigned long i=0;i<delays;i++) outp[i]=init_val;
}
flog
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Netlist example
telecommunication
:
elec_wire w1, w2, w3, w4, w5, tr;
elec_gnd gnd;
//reference node
w4 rp1
w1
rp2
w5
lp
w3
w2
double Rp1=60.0, Rp2=40.0;
double Cp=1e-12, Lp=1e-3;
tr
V vconst(w1,gnd,2.0);
cp
i2v
vconst
R rp1 (w4,w2,Rp1);
R rp2 (w2,w3,Rp2);
C cp (w2,gnd,Cp);
L lp (w3,tr,Lp);
CCVS i2v (w5,gnd,w1,w4,1.0);
//Current Controlled Voltage Source
:
// signal tracing
trace tr1(MATLAB,“tr1.dat“);
tr1.add(&w1); //node voltage
tr1.add(&lp); //current through lp
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Results
telecommunication
echo
ADSL-Line driver front-end
b-filter
data
Ca. 50 linear elements
receive filter
twisted pair line
data
dc/voice line
driver
Different lines via coefficient
file
hybrid
transformer
voice/dc
subscriber
v(iout)
voice/data
Time step size 1.0/17.664MHz
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Performance estimation
Multi tone signal from
100Hz to 1MHz on voice
Samplerate: 1.0/17.664MHz
Time interval:40 ms
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0.08
0
0.06
−10
0.04
db
−20
Graphs:
Amplitude and phase over frequency (for transient fft-result)
0.02
Saber transient
C++
−30
0
−40
−50
2
10
Comparison between:
Saber - AC- Analysis (reference)
Saber - transient analysis
C++ (MixSigC) transient analysis
4
10
−0.02
2
10
6
10
f(Hz)
0
grd
grd
0
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−0.05
Saber transient
−0.1
−100
−200
2
10
6
10
0.05
100
122 sec.
4
10
f(Hz)
200
Computation time:
Saber transient
(default parameters): 2670 sec.
C++ transient:
Difference to Saber AC
Frequency behavior voice to line
Input:
db
telecommunication
C++
−0.15
4
10
6
10
−0.2
2
10
4
10
6
10
14
RF-Baseband
RF-extensions
Modeling using dataflow
scheduler
BB
gain
LNA
e.g. Literature:
G. Vandersteen et. al
„A methodology for efficient
high-level dataflow simulation
of mixed-signal front-ends of
digital telecom transceivers“
ADC
PLL
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Nonlinear equation in dataflow blocks
Utilization unit
Acceleration a
Beams
Embedded nonlinear equation
solver
Capacity C
Frame
Accelerationmass
Electro-static force F
Elektrodes
Dynamic time step control
internally
Ansys matrix-export +
model generator
Interfaces
Externally dataflow time steps
Acceleration a
Nonlinear
equation
system
Current
Voltage
Signalprocessing
Controller
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Example for nonlinear equation system
SDF_MODULE(nonlinear_example)
{
sdf_inport<double> ue_sdf;
sdf_outport<double> ua_sdf;
S
R1
ue
s
C1
Ra
:
out_eq ua; in_eq ue; state_eq s;
ua
void init() {
ua=0.0;
s=0.0 }
void equations() {
Network equations:
0=
0=
null[0] = C1*d_t(ua) + ua/Ra - Is*(exp((s-ua)/md/Ut) - 1);
null[1] = (s-ue)/R1 + Is*(exp((s-ua)/md/Ut) - 1); }
C1 ua + ua/Ra
- Is (exp((s - ua)/(md Ut)) - 1)
void sig_proc() {
ue=ue_sdf;
solve_equations();
ua_sdf=ua; }
:
(s - ue)/R1
+ Is (exp((s - ua)/(md Ut)) - 1)
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17
Conclusions/Observations
Different Models of Computation useful for analog domains
also
Excellent performance can be reached by combination of
MoC’s
On system level the dataflow MoC’s is well adapted for analog
MoC integration
Conceptual there are no restrictions for analog integration (the
question is what makes sense)
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SystemC and Mixed-Signal Simulation Concepts

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