xs200 module hardware specification rohs version

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xs200 module hardware specification rohs version
page 1/61
Direction des Recherches et des Développements
VELIZY R&D Center
Etablissement de VELIZY
XS200 MODULE
HARDWARE SPECIFICATION
ROHS VERSION
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Direction des Recherches et des Développements
VELIZY R&D Center
Etablissement de VELIZY
NOTE D'ETUDE / TECHNICAL DOCUMENT
FICHE RECAPITULATIVE / SUMMARY SHEET
Ed
1
Date
Référence
Date
Reference
19/09/2006 Erreur! Source
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69255
Rédacteur(s)
Relecteur(s)
Writer(s)
S. WANG
Reviser(s)
M.
BOUTBOUL
Pages modifiées / Changed
pages
Observations
Comments
Update specifications for RoHS
compliance
Update of specifications for Quad
Band
§ 1.6 Update of specifications for
MSL5A compliance and
temperature range
§ 2 Update of the block diagram
§ 3.8 added the spare IOs
§ 5.10 addition of pulse duration
at cold temperature
§ 6 update of extended range
2
3
4
5
6
7
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Direction des Recherches et des Développements
VELIZY R&D Center
Etablissement de VELIZY
SOMMAIRE / CONTENTS
1.
2.
3.
OVERVIEW ................................................................................................................................................................ 5
1.1
OBJECT OF THE DOCUMENT................................................................................................................. 5
1.2
STANDARDS COMPLIANCE .................................................................................................................... 5
1.3
COMPLIANCE WITH FCC GUIDELINES.................................................................................................. 6
1.4
TERMS AND ABBREVIATION .................................................................................................................. 6
1.5
CONVENTIONS ........................................................................................................................................ 7
1.6
PRODUCT FEATURES............................................................................................................................. 8
BLOCK DIAGRAM .................................................................................................................................................... 10
FUNCTIONAL DESCRIPTION.................................................................................................................................. 11
3.1
SIM .......................................................................................................................................................... 11
3.2
AUDIO ..................................................................................................................................................... 12
3.3
NETWORK LED ...................................................................................................................................... 13
3.3.1
Network / Low BATTERY........................................................................................................ 13
3.3.2
Messages ............................................................................................................................... 13
3.3.3
Handfree call........................................................................................................................... 13
3.3.4
Summary chart ....................................................................................................................... 14
3.4
DATA ....................................................................................................................................................... 14
3.4.1
Data services .......................................................................................................................... 14
3.4.2
UART1: V24............................................................................................................................ 14
3.4.3
IrDA ........................................................................................................................................ 14
3.4.4
UART 2 ................................................................................................................................... 15
3.5
ANTENNA ............................................................................................................................................... 15
3.6
DAI........................................................................................................................................................... 15
3.7
CLOCKS.................................................................................................................................................. 15
3.8
SPARE I/OS ............................................................................................................................................ 15
3.9
POWER MANAGEMENT AND CHARGE................................................................................................ 16
3.9.1
Battery .................................................................................................................................... 16
3.9.2
VRIO ....................................................................................................................................... 16
3.9.3
Vbackup.................................................................................................................................. 16
3.9.4
Charge.................................................................................................................................... 16
3.9.5
AC/DC switching charger........................................................................................................ 17
3.9.5.1 Operating temperature ............................................................................................................... 17
3.9.5.2 Electrical ratings ........................................................................................................................ 17
3.9.5.3 Thermal ratings.......................................................................................................................... 18
3.9.6
Simple battery charger............................................................................................................ 18
3.10 POWER MANAGEMENT ........................................................................................................................ 19
3.10.1 Interface identification and diagrams. ..................................................................................... 19
3.10.2 Different strategies.................................................................................................................. 19
3.10.3 Recommended strategy : software management ................................................................... 20
3.10.4 Interface specification. ............................................................................................................ 20
3.10.4.1 Management by DCE alone. ...................................................................................................... 20
3.10.4.2 Inhibition by DTE...................................................................................................................... 20
3.10.4.3 Hardware management. ............................................................................................................. 20
3.11 DATA / COMMAND MULTIPLEXING ...................................................................................................... 37
3.11.1 Hardware multiplexing ............................................................................................................ 38
3.11.1.1 External interfaces ..................................................................................................................... 38
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3.11.1.2 Capability requirements............................................................................................................. 38
3.11.2 Multiplexing using UART1 & 2 ................................................................................................ 42
4. PINOUT .................................................................................................................................................................... 43
5. ELECTRICAL SPECIFICATION ............................................................................................................................... 48
5.1
VBAT ....................................................................................................................................................... 48
5.2
VRIO........................................................................................................................................................ 49
5.3
DAI INTERFACE ..................................................................................................................................... 49
5.4
NETWORK LED ...................................................................................................................................... 49
5.5
SIM .......................................................................................................................................................... 49
5.6
V24 (UART 1) .......................................................................................................................................... 50
5.7
UART2..................................................................................................................................................... 50
5.8
IRDA ........................................................................................................................................................ 50
5.9
DATA / COMMAND MULTIPLEXING ...................................................................................................... 50
5.10 POWER MANAGEMENT ........................................................................................................................ 51
5.11 AUDIO SIGNALS..................................................................................................................................... 51
5.12 CHARGER............................................................................................................................................... 53
5.13 RESET..................................................................................................................................................... 53
5.14 SPARE IO................................................................................................................................................ 53
5.15 CLOCKS.................................................................................................................................................. 53
5.16 JTAG INTERFACE .................................................................................................................................. 54
6. ENVIRONMENTAL SPECIFICATION....................................................................................................................... 54
7. MECHANICAL SPECIFICATION .............................................................................................................................. 55
7.1
PHYSICAL DIMENSIONS ....................................................................................................................... 55
7.2
TERMINAL ASSIGNMENTS ................................................................................................................... 57
ANNEXE 1 : IO DESCRIPTION ........................................................................................................................................ 58
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1. OVERVIEW
1.1 OBJECT OF THE DOCUMENT
This document gives an overview of the XS200 module: a miniature, single-side, BGA board, Quad-band*
GSM/GPRS module, ready for integration in various kind of devices like Smartphones and modem.
It describes the main features (GPRS / GSM 850MHz / GSM 900MHz / DCS 1800MHz / PCS 1900MHz),
interface to a SIM interface, audio interfaces for speaker/microphone or accessories, battery interface,
battery charging interface, sensor interface …) of this module as well as the electrical interfaces, the
mechanical specification (dimension, form…) and the electrical specification of the module.
1.2 STANDARDS COMPLIANCE
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
GSM 02.60: "Digital cellular telecommunications system (Phase 2+); Stage 1 Service Description of the
General Packet Radio Service (GPRS)". Version 6.3.0.
GSM 03.03: "Digital cellular telecommunications system (Phase 2+); Numbering, addressing and
identification". Version 6.6.0.
GSM 03.13: "Digital cellular telecommunications system (Phase 2+); Discontinuous Reception (DRX) in
the GSM system". Version 6.0.0.
GSM 03.60: "Digital cellular telecommunications system (Phase 2+); General Packet Radio Service
(GPRS); Service description; Stage 2". Version 6.7.0.
GSM 03.64: "Digital cellular telecommunications system (Phase 2+); General Packet Radio Service
(GPRS);Overall description of GPRS radio Interface; Stage 2". Version 6.4.0.
GSM 04.02: "Digital cellular telecommunications system (Phase 2+); GSM Public Land Mobile Network
(PLMN) access reference configuration". Version 6.0.0.
GSM 04.03: "Digital cellular telecommunications system (Phase 2+); Mobile Station - Base Station
System (MS - BSS) interface Channel structures and access capabilities". Version 6.0.0.
GSM 04.04: "Digital cellular telecommunications system (Phase 2+); Layer 1 General requirements".
Version 6.0.0.
GSM 04.05: "Digital cellular telecommunications system (Phase 2+); Data Link (DL) layer General
aspects". Version 6.0.1.
GSM 04.07: "Digital cellular telecommunications system (Phase 2+); Mobile radio interface signalling
layer 3 General aspects". Version 6.5.1.
GSM 04.08: "Digital cellular telecommunications system (Phase 2+);Mobile radio interface layer 3
specification". Version 6.11.0.
GSM 04.60: "Digital cellular telecommunications system (Phase 2+); General Packet Radio Service
(GPRS); Radio Link Control/Medium Access Control (RLC/MAC) protocol". Version 6.9.0.
GSM 04.64: "Digital cellular telecommunications system (Phase 2+); General Packet Radio Service
(GPRS); Logical Link Control (LLC)". Version 6.7.0.
GSM 04.65: : "Digital cellular telecommunications system (Phase 2+); General Packet Radio Service
(GPRS); Mobile Station (MS) - Serving GPRS Support Node (SGSN); Sub network Dependent
Convergence Protocol (SNDCP)". Version 6.7.0.
GSM 05.02: "Digital cellular telecommunications system (Phase 2+); Multiplexing and multiple access on
the radio path". Version 6.9.0.
GSM 05.03: "Digital cellular telecommunications system (Phase 2+); Channel coding". Version 6.2.1.
GSM 05.08: "Digital cellular telecommunications system (Phase 2+); Radio subsystem link control".
Version 6.8.0.
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•
•
•
•
•
GSM 05.10: "Digital cellular telecommunications system (Phase 2+); Radio subsystem synchronisation".
Version 6.6.0.
3GPP TS 26.131 V5.2.0 (2002-09) : Terminal acoustic characteristics for Telephony; Requirements
3GPP TS 26.132 V5.4.0 (2003-09) : Speech and video telephony terminal acoustic test specification
GCF-CC V3.14.0
NAPRD03 V2.10.1
1.3 COMPLIANCE WITH FCC GUIDELINES
Fix-mount and mobile devices incorporating XS200 modules must be designed to maintain a minimum
separation distance of 20 cm between the antenna and the end user to satisfy RF exposure requirements for
mobile transmitting devices.
For portable devices incorporating XS200 modules, the manufacturer of the final device is responsible to
perform SAR measurements.
Any integration of XS200 into a portable device requires a new certification procedure.
1.4 TERMS AND ABBREVIATION
ADC
ADPCM
AFC
ASIC
BMP
CODEC
CTS
DAC
DAI
DCS
DSP
DSR
DTR
EGSM
EMS
ESD
ETS
GSM
GPRS
IC
IEEE
I/O
IRDA
ISO
ITU
JPEG
JTAG
KBPS
LCD
LED
LNA
MBPS
MIDI
Analog to Digital Converter
Adaptive Delta Pulse Code Modulation
Application Frequency Correction
Application Specific Integrated Circuit
Bitmap
Coder-Decoder
Clear To Send
Digital to Analog Converter
Digital Analog Interface
Digital
Data Signal Processor
Data Set Ready
Data Terminal Ready
Enhanced GSM
Enhanced Messaging Services
Electrostatic Discharge
European Telecommunication Standard
Global Standard for Mobile communication
Global Packet Radio Services
Integrated Circuit
Institute of Electrical and Electronics Engineers
Input / Output
Infra Red
International Standards Organisation
International Telecommunication Union
Joint Picture Expert Group
Joint Test Action Group
Kbit per second
Liquid Crystal Display
Light Emitting Diode
Low Noise Amplifier
Mbit per second
Musical Instrument Digital Interface
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MMI
PA
PBCCH
PCB
PCS
PLL
PNG
RAM
RF
RI
RMS
RTS
RX
SIM
SMS
SRAM
TBC
TBD
TX
UART
USB
USSD
VCO
WAP
WBMP
Man Machine interface
Power Amplifier
Packet Broadcast Channel
Printed Circuit Board
Personal Communication System
Phase Locked Loop
Portable Network Graphics
Random Access Memory
Radio Frequency
Ring Indication
Root Mean Square
Ready To Send
Receive direction
Subscriber Identification Module
Short Message Service
Static Random Access Memory
To Be Confirmed
To Be Defined
Transmit direction
Universal Asynchronous Receiver and Transmitter
Universal Serial Bus
Unstructured Supplementary Service Data
Voltage Controlled Oscillator
Wireless Application Protocol
Wide Bitmap
1.5 CONVENTIONS
Throughout this document, DTE (Data Terminal equipment) indicates the equipment which masters and
controls the module device XS200 by simply sending AT commands via its serial interface.
DCE (Data Communication Equipment) indicates the module device XS200.
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1.6 PRODUCT FEATURES
Normal range: -10°C to +55°C (fully compliant)
Extended range: -30°C to –10°C and +55°C to +75°C
(functional without any risk for the network)
Storage: -40°C to °85°C
Temperature range
MSL
Weight (in g)
ESD
Physical dimensions
Connection
Power supply
Power consumption
Battery charge management and interface
Antenna connection
Frequency bands
Voice codecs
GSM class
Transmit power
Supported SIM card
SIM slot
Network LED
Audio up-link
Audio down-link non stereo
Audio down-link stereo
UART1 interface with flow control
Product is MSL 5A
10g
ESD protected < 1.5 kV
33x38x3.3 mm (typical)
BGA type connection (including antenna and battery
connection)
3.45V to 4.5V range, 3.8V nominal.
Off mode: 120 uA (typ)
Standby mode: < 2.5 mA (typ)
Communication mode: 280 mA (typ at Pmax), 2.2 A
peak during TX slot
Battery charge management is included for regulated
charger to 600mA maximum charge current.
Specific un regulated charger qualified by SAGEM
could be used (see application note).
No antenna included in the module. Antenna
connection is included in the BGA ball-out. See
recommendations for connection.
XS200 : GSM850 + EGSM900 + DCS1800 +
PCS1900
Half Rate, Full Rate, Enhanced Full Rate,
Adaptive Multi Rate
Small MS
Class 4 (2W) for GSM850 / EGSM900
Class 1 (1W) for DCS1800 / PCS1900
3V SIM cards.
To prevent SIM card’s damages, the power supply of
the module has to be turned off before any
manipulation of the SIM card.
Not included on the module. Signals for the
management of the SIM card are provided on ballout.
LEDR & LEDG management.
2 differential inputs are provided for microphone
(accessories and handset).
2 differential outputs are provided for non stereo
earphone (accessories and 6 ohms and 32 ohms).
3 outputs are provided for stereo earphone
(accessories and handset).
Up to 115.2 Kbaud with auto bauding.
Full flow control signals (+2.8V) are provided on ballout.
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IrDA interface or UART2 interface
Data services
Supplementary
commands)
services
(supported
Reset pin
Power on pin
General purpose I/Os pin
GPRS
GSM/DCS certification GCF-CC
PCS certification
via
If a full compliant RS232 (+/-5V) serial interface is
needed:
The drivers (like MAX3232, ST3237CD, …) are not
included in the module and have to be added on the
main PCB.
A proven schematic to build the RS232 interface is
provided in application note.
Up to 115.2 Kbaud.
UART2 and IrDA are not multiplexed but could not be
used at the same time.
GPRS, CSD, Fax
Caller Line Identification, Call Waiting, Call Hold, Call
AT
Forwarding, Multiparty, Call Barring, Advice of
Charge, USSD, CPHS
Active high signal available (reset of all the system
including backup)
Available
4 I/O available on ball-out.
SMG 31bis, Multi slot class 10, class B terminal,
PBCCH support
GCF-CC V3.14.0
NAPRD03 V2 .10.1
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2. BLOCK DIAGRAM
XS200
GPRS
GSM900 / GSM850
DCS1800 / PCS1900
VBAT
Module On signal
Mod_On*_Cmd
Module Off signal
Mod_Off*_Cmd
VBAT
47µF - 10V
Dte_reset*_cmd
Mod_Esc._Cmd
Mod_on_state
DTE_Esc._Cmd
Power
management
+
Mod_uart_state
Data/command
multiplexing
(hardware solution)
Mod_flow_state
Mod_reset_state
Dte_uart*_state
UART2
V24
Interface
Transceiver
(if necessary)
UART1
Mod_reset_cmd
USL 90
100K
USL 92
VBAT
100K
LEDR
LEDG
DAI Interface
Microwire interface
Spare I/O
+
I2C interface
IrDA interface
SIM interface (3V)
SIMCLK
SIMRST
SIMVCC
SIMIO
SIMCD
MICIP
MICIN
Handset Microphone
HPP8
HPN8
Handset
Speaker
HPP32
HPN32
earpiece
Accessory
earphone
HSOR
HSGND
HSOL
+
HSMICIP
HSMICIN
Figure 1
XS200 bloc diagram
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Accessory Microphone
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3. FUNCTIONAL DESCRIPTION
3.1 SIM
The SIM Card interface is compatible with the ISO 7816-3 IC card standard on the issues required by the
GSM 11.11 Phase 2+ standard. The module also supports Release 99 of the SIM Toolkit recommendation
too and supports a Fixed Dialling Number directory.
The SIM Card interface insures the detection (SIMCD), the power on (SIMVCC) of the SIM Card and the
communication with it through a data signal (SIMIO), a clock signal (SIMCLK) and a reset signal (SIMRST).
Signal
SIMRST
SIMCLK
SIMIO
SIMVCC
SIMCD
Description
SIM reset, provided by Base-band processor
SIM clock, provided by Base-band processor
SIM serial data line, input and output
SIM supply voltage
SIM insertion detection
SIM card connection:
XS200
SIMVCC
SIMIO
SIMRST
SIMCLK
SIMCD
SIM card
In option
Figure 2
SIM connection
The SIMCD signal should be connected to the SIM card reader in order to get SIMCD at low level (GND)
when no card is present and at high level (SIMVCC) when card is present (external pull down needed when
SIM card connector with detection is used).
This interface includes main protections.
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3.2 AUDIO
The module supports the following voice codecs:
• Half-Rate
• Full-Rate
• Enhanced Full Rate
• Adaptive Multi Rate
It manages an external handset microphone (MICIP/MICIN) and an external handset earphone (33 Ohms
HPP32/HPN32 and minimum 6 Ohms HPP8/HPN8) in differential mode.
The bias voltage of the microphone is provided directly on MICIP/MICIN pins (2.5V)
There are two options for the earphone:
- Two earphones, one 33 Ohms as receiver and one 6 Ohms minimum as Ring/melody and as hands-free
loudspeaker if it is far from the microphone.
- one 32 Ohms earphone as receiver.
The module can also manage accessories (earphone and microphone) through dedicated lines
(HSMICIP/HSMICIN for microphone and HSOL/HSOR for stereo earphone). The typical impedance for the
earphone is 32 Ohms.
Base-band
Ampli+Filter
MICIP
MICIN
HSMICIP
HSMICIN
HPP32
HPN32
HPP8
HPN8
HSOL
HSOR
Figure 3
Audio
This interface includes main protections.
To ensure proper operation of such sensitive signals, there have to be isolated from the other by ground on
mother board layout.
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3.3 NETWORK LED
Three external pins of the module are dedicated to network and alarm LEDs:
- LEDR
- LEDG
This interface includes main protections.
3.3.1 Network / Low BATTERY
The network/battery indication consist in by a 30ms flash with period of 2 s.
The flash can take 3 colors:
•
green when network attached and battery ok.
•
orange (green + red) network attached and battery low.
•
red no network and battery low.
The battery threshold is 3650 mV.
3.3.2 Messages
The message received indication takes place after the network/battery indication, it consists in 3
successive 20ms red flashes. It indicates the presence of a new SMS or voice mailbox.
3.3.3 Handfree call
During a handfree call (with at+vip=1 during a call), the led becomes alternately red and green with a
period of 1 s. Handfree led mode has priority over other modes (Network,Messages…)
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3.3.4 Summary chart
Battery low :
Network :
+ battery low :
Message received :
(SMS, voice / not read)
+ battery low :
Communication :
+ battery low :
Communication (handsfree) :
+ battery low :
(no effect)
+message:
(no effect)
3.4 DATA
3.4.1 Data services
The module supports the following services:
• GPRS
• CSD: transparent and non-transparent up to 9600 BPS
• Fax: class 1 group 3
3.4.2 UART1: V24
A V24 interface is provided on external pins of the module with the following signals:
- RTS/CTS
- RX/TX
- DSR
- DTR
- DCD
- RI
It supports speeds up to 115.2 KBPS and may be used in auto bauding mode.
3.4.3 IrDA
This UART interface is compatible with 16C750 compliant devices. It includes the slow infra-red protocol in
order to be connected with an infra-red transmitter to any external data peripherals with an IrDA compliant
data interface.
This IrDA interface (TXIR, RXIR and CMDIRDA) provided by the module is compliant with the IrDA 1.0 SIR
up to 115.2 Kbaud.
This interface could not be used at the same time as UART2 interface.
This interface includes main protections.
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3.4.4 UART 2
It is strongly recommended to leave this interface externally accessible for Debug.
This interface could not be used at the same time as IRDA interface.
3.5 ANTENNA
The antenna connection is driven through the 'antenna' ball. This is a 50 ohms RF connection and as such
must be connected to the antenna via a proper 50 ohms line; the RF ground is provided by the 5 balls
surrounding the antenna ball. A matching network might be required between the module antenna
connection and the actual antenna to further adapt the antenna impedance to the module. An example of
connection is provided in the application note together with some layout guidelines.
3.6 DAI
A DAI interface is provided on the module for type approval tests.
3.7 CLOCKS
A 32KHz frequency clock, a 13MHz frequency digital clock and a 26MHz frequency analogue clock are
provided on external pins of the module.
To ensure proper operation of such sensitive signals, they have to be isolated from the other by ground on
mother board layout.
3.8 SPARE I/OS
Four general purpose I/Os are available on the module: IO5, IO6, IO7 and IO11.
They can be customised on request, from the customer’s specifications.
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3.9 POWER MANAGEMENT AND CHARGE
3.9.1 Battery
The power supply signal VBAT is 3.45V to 4.5V range and 3.8V nominal.
Only Li-Ion battery are supported.
It has to be more than 3.2V, even during transients in order to avoid unwanted resets. The power supply
dropout has to be limited to 450mV, when the current consumption goes from minimum to maximum (0.1 to
2A). The noise level of the power supply has to be limited to 50mV RMS in the 100MHz – 1MHz frequency
range
SAGEM advises to use Sanyo or LG battery. If battery is used, SAGEM agreement is needed (slight
qualification tests).
Only battery with 200mohms maximum internal resistor are managed by the module.
Mandatory: External capacitor of 47µF has to be added as near as possible from the battery
connector of mother board for charge needs.
3.9.2 VRIO
+2.8V output is available on external pin of the module and could supply +2.8V external components (current
capability 10mA in active mode).
This interface includes main protections.
3.9.3 Vbackup
External Backup could be supply through the VBACKUP input (from 2.2V to 3.2V). A internal mechanism is
present to charge the backup battery.
If No external Backup is supplied, VBACKUP input has to be connected to VBAT signal.
3.9.4 Charge
This interface manages the charge of the mobile for regulated charger, when a charger is connected, even in
the following conditions: deeply discharged battery, short-circuited battery and unconnected battery (600mA
with regulated charger).
The interface manages the charge of some unregulated chargers, that have to be qualified by SAGEM (see
listing in application note).
This interface includes main protections.
WARNING:
When using XS200 module as slave modem of a Host system sharing the same power supply (example
:PDA…), it’s strongly recommend to manage the charging function on Host side: so, in such a case, don’t
use the charge function of the module
The charger interface must be connected with wide tracks (1 mm width / 17.5um height tracks on the
XS200 ) to allow 600 mA maximum current from the charger.
Warning:
• On bottom connector of the main board, do not place Vbat pin next to charger pin because in case of
oxidation, the mobile could never detect the charger presence. Insert some pin between these two
pins.
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•
•
•
There must not be any capacitor on the Charge path. Make a straight connection between the system/
bottom connector and the module charge inputs.
Ask the charger supplier to add at the output of the charger a diode to avoid any discharge from the
battery when the charge is only disconnected from the main AC supply.
Add a Zener diode to protect the module against over voltage.
3.9.5 AC/DC switching charger
3.9.5.1 Operating temperature
0°C to +55°C.
3.9.5.2 Electrical ratings
Is
Battery charger
Vs
Vp
Figure 4
Charging.
Class II equipment (EN 60950 § 1-2-4-2)
3.9.5.2.1 Primary input voltage
98V < Vp < 254V ; F = 50/60Hz.
3.9.5.2.2 Primary/secondary insulation
Security transformer class E (EN 60950 § 5-1)
Electric strength : reinforced insulation (EN 60950 § 5-3-2)
3.9.5.2.3 Static output template
Figure 5
Charging valid area.
Is
550 mA
VALID AREA
500 mA
450 mA
0
Vs
6V
7V
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3.9.5.2.4 Dynamic output template
An external device is controlling the battery charge by means of a switch S1, which can be switched on and off.
Following templates shows the output current and voltage during transients, this feature is very important to
enable the charging control by controlling S1 (PWM).
Warning: These are the most important characteristics for a charger (it concerns the safety of the XS200
module). A charger has to be (at least) fully compliant with the current and voltage transients.
Is
S1
BATTERY CHARGER
Vs
0V <Vbat< 4.5V
Figure 6
Charge principle.
Vs (dynamic)
Is (dynamic)
VALID AREA
5A Max
VALID AREA
20V Max
Ripple : +/- 200mV
Ripple : +/- 50mA
0.2ms Max
5ms Max
Time
Time
S1
is
switched off
S1
is
switched on
Figure 7
Transients in charge: Current transients & Voltage transients.
3.9.5.2.5 Reverse current (main off)
Main off or unplug, the current flowing from the battery to the charger have to stay smaller than « Ir » in order
to prevent discharge !
Ir < 100µA for VBAT ≤ 5V
3.9.5.3 Thermal ratings
The heating of the enclosure will comply with EN 60950 § 5-1
Tab. 16 - part 2.
3.9.6 Simple battery charger
Ask SAGEM to check compatibility for this kind of charger.
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3.10 POWER MANAGEMENT
3.10.1 Interface identification and diagrams.
On an external point of view (i.e. as seen by a DTE), the XS200 has 4 different states:
•OFF:
In this state, none of the XS200 functionality are running (the serial link is switched off)
•ON
Sleep:
In this state, the XS200 is asleep and the external serial link is switched off. Any interrupt will wake
the module up as well as the external serial link. An interrupt can be generated by reception of a
character but it is lost.
NB: in this state, the module is attached to the GSM network.
•ON
Active:
In this state, the XS200 is switched on and the serial link is activated. The XS200 is able to receive
correctly the data sent by the DTE.
NB: in this state, the module is attached to the GSM network.
•Reset:
This state indicates that the XS200 is in its setup procedure and implies that the serial link is
deactivated.
3.10.2 Different strategies
The transition of the XS200 from awake to asleep can be managed in 4 different ways:
•
Inhibition by DTE:
The DTE can forbid the XS200 to go to sleep. But if it is allowed to sleep, it do it when it wants and
without informing the DTE.
This allows a very simple management by the DTE but should be used when the power
management is not a critical issue. In this case, the DTE only handles the ON and OFF states
without any requirement.
•
Management by DCE alone:
The XS200 goes to sleep on its own decision and the DTE can't forbid it. The DTE doesn't know the
state of the XS200.
This is the most common case because it allows to reduce the module’s consumption without
requiring special treatments on the host side. In this case, the host uses the UART capabilities to
wake up on a byte reception (*).
(*): The first byte may be lost by the module
•
Software management:
A software management of the power consumption can be handled via the GSM 07.10 protocol.
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•
Hardware management:
The transition to sleep state is done only when the 2 equipments agree. So each one knows the
state of the other.
This solution allows to switch off the serial link on both side and so to save as much battery life as
possible; it is strongly recommended when the battery life is a critical issue.
Details are given in the following chapters.
3.10.3 Recommended strategy : software management
Sagem recommends software management of the power consumption via the GSM 07.10 protocol.
3.10.4 Interface specification.
3.10.4.1 Management by DCE alone.
RTS
DTR
XS200
MO190
(DCE)
DTE
RX
TX
When the UART of the XS200 doesn't detect any activity on the RX input during a certain time, it
allows the XS200 to switch off the UART when it wants. The DTE doesn't know when the XS200
switches its UART off.
If the DTE sends data to the XS200 when the UART is off, the first character will wake up the DCE
and the first byte may be lost. Another way for the DTE to wake up the XS200 is to put down its
DTR or RTS.
3.10.4.2 Inhibition by DTE.
It is the same management as in 3.9.4.1 except that as long as the DTE has its DTR active, the
XS200 is not allowed to switch off the UART anymore.
3.10.4.3 Hardware management.
This management uses signals to inform each equipment of the state of the other one. Signals are
also used to request a change of state of the other.
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This methods allows to achieve a lower power consumption of the device by switching off the
interface modules as often as possible (i.e. when no communication is needed).
3.10.4.3.1 Signals.
There are 5 outputs and 4 inputs used to control the different states:
Output: MOD_ON_STATE, DTE_RESET*_CMD,MOD_UART_STATE,
MOD_FLOW_STATE and MOD_RESET_STATE.
Inputs:
MOD_ON*_CMD, MOD_RESET_CMD, DTE_UART*_STATE, MOD_OFF*_CMD.
As for now, the DTE_RESET*_CMD is not actually controlled by the XS200. It is just provided
as a spare in case the DTE needs a reset command from the DCE (very unlikely).
DTE_RESET*_CMD
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
MOD_OFF*_CMD
XS2xx
(DCE)
MOD_ON*_CMD
DTE
DTE_UART*_STATE
MOD_RESET_CMD
RX
TX
MOD_ON_STATE is active when the XS200 is ON.
MOD_UART_STATE is inactive when the XS200 is in deep sleep.
MOD_FLOW_STATE is inactive when the XS200 has nothing to send.
MOD_RESET_STATE is active during the software reset procedure, but it can not be
trusted during hardware reset.
MOD_OFF*_CMD command the switch off of the XS200.
MOD_ON*_CMD command the switch on of the XS200.
DTE_UART*_STATE is inactive when the DTE has nothing to send. If MOD_FLOW_STATE
is inactive too, the DTE can switch off its UART.
MOD_RESET_CMD command the reset of the DCE.
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To make an interface with a host, the XS200 power management and hardware multiplexing
signals need to be polarized with pull down or pull up resistors :
Power management inputs :
DTE_UART*_STATE need a pull up resistor (100K).
Power management outputs :
MOD_RESET_STATE, MOD_UART_STATE, MOD_FLOW_STATE and MOD_ON_STATE
need pull-down resistors (100K).
Hardware multiplexing signals :
MOD_ESCAPE*_CMD and DTE_ESCAPE_CMD : see § 3.10.1.1.
3.10.4.3.2 Signals and states.
In these tables as well as in the following chapters, we will consider the logical levels (active,
inactive or either) and not the actual electric one (high, low ...).
•
XS200 modes:
Each state is represented by the combination of MOD_ON_STATE and MOD_UART_STATE
signals.
MOD_ON_STATE
MOD_UART_STATE
MOD_RESET_STATE
Inactive
Inactive
Inactive
ON Sleep
Active
Inactive
Inactive
ON Active
Active
Active
Inactive
RESET
Active
Either
Active
OFF
•
DTE modes:
The DCE only needs to know if the serial link of the DTE is active or not. It is represented by
the DTE_UART_STATE signal.
DTE_UART_STATE
OFF
Inactive
ON Sleep
Inactive
ON Active
Active
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Logical and electrical levels:
Signal
Logical levels
Electrical levels
DTE_RESET*_CMD
Active
Inactive
Low level
High level
MOD_ON_STATE
Active
Inactive
High level
Low level
MOD_RESET_STATE
Active
Inactive
Active
Inactive
Active
Inactive
High level
Low level
High level
Low level
High level
Low level
MOD_OFF*_CMD
Active
Inactive
Low level
High level
MOD_ON*_CMD
Active
Inactive
Low level
High level
DTE_UART*_STATE
Active
Inactive
Low level
High level
MOD_RESET_CMD
Active
Inactive
High level
Low level
XS200 output
MOD_UART_STATE
MOD_FLOW_STATE
XS200 input
3.10.4.3.3 Communication protocols.
3.10.4.3.3.1 Transition tables.
This table lists the possible transition of the DCE from one state to another and which
equipment can initiate the change.
Initial
Final
OFF
OFF
ON Sleep
ON Active
RESET
Impossible
DTE
Impossible
DCE/DTE
DCE/DTE
ON Sleep
DTE
ON Active
DTE
DTE/DCE
X
Impossible
RESET
DCE/DTE
X
3.10.4.3.3.2 Command signals.
A logical rising edge on MOD_ON_CMD means that the DTE wants the DCE to go ON.
A logical rising edge on MOD_OFF_CMD means that the DTE wants the DCE to go OFF.
A logical falling edge on DTE_UART_STATE means that the DTE has nothing to send yet.
A logical falling edge on MOD_FLOW_STATE means that the DCE has nothing to send yet.
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3.10.4.3.3.3 Transition from OFF to ON Active.
This transition is only possible by a command from the DTE (the XS200 never switches off by
itself).
Levels shown on the diagram are logical levels (active, inactive, either)
MOD_OFF_CMD
D
C
E
i
n
p
u
t
s
MOD_ON_CMD
DTE_UART_STATE
MOD_RESET_CMD
RX
TX
D
C
E
o
u
t
p
u
t
s
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
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3.10.4.3.3.4 Transition from ON Active to ON Sleep.
This transition can be initiated by DCE or DTE.
When an equipment has nothing to send any more, it informs the other. If the other equipment
has nothing to transmit too, they can go to SLEEP state.
The UART of both the equipment's can switch off only when DTE_UART_STATE and
MOD_FLOW_STATE are inactive.
3.10.4.3.3.4.1 Initiated by DTE.
MOD_OFF_CMD
D
C
E
i
n
p
u
t
s
MOD_ON_CMD
UART is OFF
DTE_UART_STATE
MOD_RESET_CMD
RX
TX
D
C
E
o
u
t
p
u
t
s
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
state 1
state 2
This transition show 2 transitory states.
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During transitory states 1 and 2, the DTE can't send data. If it has to, it must put
DTE_UART_STATE up first.
During transitory state 1, the DTE can receive data and the DCE can send data: there's no
problem for DCE to emit.
During transitory state 2, the DCE can't send data and the DTE can't receive data. So if the
DCE wants to emit, it must put MOD_FLOW_STATE up first.
The state 2 can be long.
3.10.4.3.3.4.2 Initiated by DCE.
MOD_OFF_CMD
D
C
E
i
n
p
u
t
s
MOD_ON_CMD
UART is OFF
DTE_UART_STATE
MOD_RESET_CMD
RX
TX
D
C
E
o
u
t
p
u
t
s
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
state 3
state 2
This transition show 2 transitory states.
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During transitory states 2 and 3, the DCE can't send data:
•
If it has to during state 2 it must put MOD_FLOW_STATE up (cf. 2.2.3.3.4.3.a) to wake up
the DTE.
•
If it has to during state 3 it has to wait for the falling edge of DTE_UART_STATE and then it
is state 2.
During transitory state 3, the DCE can receive data and the DTE can send data: there's no
problem for DTE to emit.
During transitory state 2, the DTE can't send data and the DCE can receive data. So if the
DTE wants to emit, it has just to put DTE_UART_STATE up (cf. 2.2.3.3.4.3.b).
The state 2 can be long.
3.10.4.3.3.4.3 Transitory states.
a) DTE has data to send:
This case can happen in transitory state 1 and state 2.
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MOD_OFF_CMD
D
C
E
i
n
p
u
t
s
MOD_ON_CMD
DTE_UART_STATE
MOD_RESET_CMD
RX
TX
D
C
E
o
u
t
p
u
t
s
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
b) DCE has data to send:
This case can happen in transitory state 2.
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MOD_OFF_CMD
D
C
E
i
n
p
u
t
s
MOD_ON_CMD
DTE_UART_STATE
MOD_RESET_CMD
RX
TX
D
C
E
o
u
t
p
u
t
s
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
3.10.4.3.3.5 Transition from ON Sleep to ON Active.
This transition can be initiated by both the DTE and the DCE.
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3.10.4.3.3.5.1 Initiated by the DCE.
MOD_OFF_CMD
D
C
E
i
n
p
u
t
s
MOD_ON_CMD
DTE_UART_STATE
MOD_RESET_CMD
RX
TX
D
C
E
o
u
t
p
u
t
s
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
3.10.4.3.3.5.2 Initiated by DTE.
The DCE can react on the rising edge of the DTE_UART_STATE signal or on the reception of
a character which will be lost. It is only used to wake up the XS200.
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MOD_OFF_CMD
D
C
E
i
n
p
u
t
s
MOD_ON_CMD
DTE_UART_STATE
MOD_RESET_CMD
This character is
not mandatory
and will be lost
RX
TX
D
C
E
o
u
t
p
u
t
s
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
3.10.4.3.3.6 Transition from ON Sleep to OFF.
This transition is only possible by a command from the DTE (the XS200 never switches off by
itself).
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MOD_OFF_CMD
D
C
E
i
n
p
u
t
s
MOD_ON_CMD
DTE_UART_STATE
MOD_RESET_CMD
RX
TX
D
C
E
o
u
t
p
u
t
s
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
3.10.4.3.3.7 Transition from ON Active to OFF.
This transition is very unlikely but still theoretically possible.
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MOD_OFF_CMD
D
C
E
i
n
p
u
t
s
MOD_ON_CMD
DTE_UART_STATE
MOD_RESET_CMD
RX
TX
D
C
E
o
u
t
p
u
t
s
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
Another solution to switch off the XS200 is the AT command AT+CPOF:
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MOD_OFF_CMD
D
C
E
i
n
p
u
t
s
MOD_ON_CMD
DTE_UART_STATE
MOD_RESET_CMD
RX
TX
D
C
E
o
u
t
p
u
t
s
AT+CPOF
OK
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
3.10.4.3.3.8 Reset
There are 2 possibilities :
•
The XS200 reboots by itself for a major internal problem and warns the DTE of this
operation. In this case, the XS200 moves the MOD_RESET_STATE signal to Active. At
the end of the reset operation, the XS200 deactivate this signal and its current state is ON
Active.
•
The DTE orders the XS200 to reset. In this case, the DTE moves the MOD_RESET_CMD
signal to initiate the process.
The latest data sent by the DTE should be considered as lost and resent to the XS200 if need
be.
This transition is possible whatever the states of the DCE and the DTE.
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At the end of the RESET, the DTE and the DCE are always ON.
3.10.4.3.3.8.1 Initiated by the DCE.
RESET
ON
MOD_OFF_CMD
D
C
E
i
n
p
u
t
s
MOD_ON_CMD
DTE_UART_STATE
MOD_RESET_CMD
RX
TX
D
C
E
o
u
t
p
u
t
s
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
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3.10.4.3.3.8.2 Initiated by the DTE.
RESET
ON
MOD_OFF_CMD
D
C
E
i
n
p
u
t
s
MOD_ON_CMD
DTE_UART_STATE
MOD_RESET_CMD
RX
TX
D
C
E
o
u
t
p
u
t
s
MOD_ON_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_RESET_STATE
3.10.4.3.3.9 Timeout.
If a command has no effect on the other equipment, it must be requested again after a one
second timeout. The maximum number of requests is 5 and then a reset procedure of the
DCE must be initiated by the DTE.
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3.11 DATA / COMMAND MULTIPLEXING
The serial link between the DCE and a DTE (PDA, phone,…) is used to send two different kinds of data flow:
AT commands and PPP data packets. these two flows cannot be mixed together (not enough bandwidth).
So, this serial link can be used in two different exclusive modes:
-
Command Mode: The serial link is reserved for the AT Commands flow
-
Data Mode:
The serial link is reserved for the data flow
But, during a data connection, the modem or the DTE may need to send some AT Commands to notify the
other side of a major event. As there is just one serial link to send these two kinds of data, it is necessary to
have a special procedure to switch from one kind to the other.
• The first solution provided by the GSM standard is to use +++ and ATO. This solution very simple to
implement, has the main drawback to allow only the DTE to control the switch between the 2 modes and
it is usually only used to hang up a data call.
• The second solution consists to implement the GSM 07.10 standard, this solution is available (customer
has to develop its own driver for the host). SAGEM recommends to use this solution.
• A third method, developed by SAGEM S.A. and explained in details hereafter in § 3.10.1, consists to
create a third mode for the serial link and handle it through hardware signals. This mode is called
“Suspended Data Mode” and is temporarily used to send AT Commands. All data must to be stored
during a Suspended data mode switch. In the case of no-response from DTE, We need to implement a
cyclic mechanism to change the hardware signals states.
• A fourth method consists in the use of UART1 and UART2 : this method is introduced in § 3.10.2.
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3.11.1 Hardware multiplexing
3.11.1.1 External interfaces
In the first set (hardware MUX), we need to use two hardware signals (MOD_ESCAPE*_CMD and
DTE_ESCAPE_CMD) and the full serial link V24.
In the second set, we only need to use the full V24.
To make an interface with a host, the XS200 hardware multiplexing signals need to be polarized with
pull down or pull up resistors :
DTE_ESCAPE_CMD need a pull down resistor (100K).
3.11.1.2 Capability requirements
3.11.1.2.1 Logical and electrical levels
Signal
Logical levels
Electrical levels
XS200 output
DTE_ESCAPE_CMD
Active
Inactive
High level
Low level
XS200 input
MOD_ESCAPE*_CMD
Active
Inactive
Low level
High level
3.11.1.2.2 Hardware protocol
SET_2 : We switch between DATA and
COMMAND
COMMAND
DATA
MUX
Hardware management:
DTE_ESCAPE_CMD and
MOD_ESCAPE_CMD
Software management:
Escape strings detection
reception
emission
V24
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3.11.1.2.3 State diagram
Already implemented
To be defined
DTE : +++
COMMAND
1
DATA
DTE : ATO
DTE : ATO
4
DTE : ATH
or
Modem : NO CARRIER
3
2
SUSPENDED
DATA
DTE : MOD_ESCAPE_CMD
or
Modem : DTE_ESCAPE_CMD
3.11.1.2.4 Transition (1): Command -> Data
The data connection is established when the PDA receives the “CONNECT: <speed>” message
from the SB.
Command mode
Modem Tx
Data mode
CONNECT:9600
Remark:
The Connect message is different between voice call, a classical data connection, a GPRS data
connection and a fax call, so it is necessary to treat the entire message to separate the data and
voice calls.
3.11.1.2.5 Transition (2): Data -> Suspended Data
The modem or the DTE can request this transition, so it is necessary to distinguish two cases.
st
1 case: the DTE orders the modem to go in the suspended data mode
1. The DTE indicates the order by moving MOD_ESCAPE*_CMD and then begins to search in the data
flow the MOD_ESCAPE_STR from the modem.
2. When the modem is ready, it sends the MOD_ESCAPE_STR string and it wait for DTE_ESCAPE_STR.
3. When receiving this string, the DTE then move back MOD_ESCAPE*_CMD and sends the
DTE_ESCAPE_STR, which indicates to the modem every byte after that must be considered as part as
an AT Command
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MOD_ESCAPE_CMD
DTE Tx
DATA
DTE_ESCAPE_STR
COMMAND
DTE_ESCAPE_CMD
Modem Tx
DATA
MOD_ESCAPE_STR
COMMAND
Wait for
DTE_ESCAPE_STR
Remarks:
•
DTE_ESCAPE_CMD = MOD_ESCAPE*_CMD = {0x18,0x7E,0xDB,0xFF}, this string could be
change by AT command in the future.
•
These two strings are the effective separation between the data flow and the command flow
nd
2
case: the modem requests the DTE to go in the suspended data mode
1. The modem indicates the request by moving DTE_ESCAPE_CMD.
2. The DTE indicates the order by moving MOD_ESCAPE*_CMD and then begins to search in the data
flow the MOD_ESCAPE_STR from the modem.
3. When the modem is ready, it sends the MOD_ESCAPE_STR string and it wait for DTE_ESCAPE_STR.
4. When receiving this string, the DTE then move back MOD_ESCAPE*_CMD and sends the
DTE_ESCAPE_STR, which indicates to the modem every byte after that must be considered as part as
an AT Command
MOD_ESCAPE_CMD
DATA
DTE Tx
DTE_ESCAPE_STR
COMMAND
DTE_ESCAPE_CMD
Modem Tx
DATA
MOD_ESCAPE_STR
COMMAND
Wait for
DTE_ESCAPE_STR
3.11.1.2.6 Transition (3): Suspended Data -> Data Mode
This transition is always ordered by the PDA via the classical ATO command.
The SB acknowledges with the CONNECT message
DTE Tx
Modem Tx
COMMAND
ATO
COMMAND
DATA
CONNECT:9600
DATA
3.11.1.2.7 Transition (4): Suspended Data -> Command Mode
The theoretical transition is Data to Command and happens to end a data connection; the
Suspended Data Mode is just a temporary transition between the two.
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The real procedure is Data to Suspended Data (already detailed in transition 2) and then Suspended
Data to Command Mode.
There are two different cases:
•
Or the distant can hang up and then the modem is going to send a “NO CARRIER” message
Suspended data mode
Modem Tx
•
COMMAND
Command mode
NO CARRIER
COMMAND
Or the DTE wants to hang up and then an ATH is sent and the transition has to be made on the answer
to this command (OK)
Suspended data mode
DTE Tx
COMMAND
Modem Tx
ATH
Command mode
COMMAND
OK
COMMAND
COMMAND
3.11.1.2.8 Timeout case
If modem didn’t receive the DTE_ESCAPE_STR after a timeout (2s), it send again his
MOD_ESCAPE_STR and wait for DTE_ESCAPE_STR as long as the MOD_ESCAPE*_CMD
signal is active. After 3 retry, module closes the MUX mechanism.
MOD_ESCAPE_CMD
DTE Tx
DTE_ESCAPE_STR
DATA
COMMAND
DTE_ESCAPE_CMD
Modem Tx DATA
MOD_ESCAPE_STR
MOD_ESCAPE_STR
Time out
COMMAND
Wait for
DTE_ESCAPE_STR
Remarks:
If MOD_ESCAPE*_CMD returns in inactive mode and the escape string hasn’t been received by the
modem, we have to resume the data connection.
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3.11.2 Multiplexing using UART1 & 2
The figure below shows a multiplexing solution using UART1 & 2:
Serial Link 1 (UART1)
SIM
Card
reader
XS200
Host
Processor
Serial Link 2 (UART 2)
Serial link 1 (UART 1) is used for AT commands (data connection initial sequence) and data flow.
Serial link 2 (UART 2) is used by the host processor for AT commands only (no management of data
flow on UART2)
Main drawback of this solution, is that no traces can be done for debug purpose because UART 2 is
exclusively used for AT commands.
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4. PINOUT
XS200
IO type
Function
XS200 Description
Pin N°
DAIRST
DAIOUT
DAIIN
DAICLK
USL1
USL2
USL3
USL4
USL5
USL6
USL7
USL8
USL9
USL10
MOD_ESCAPE*_CMD
Input
Output
Input
Input
Input
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
DAI interface
(for certification
tests only)
DAI reset
DAI output data
DAI input data
DAI clock
-
M4
M3
M2
L2
T5
S4
S5
S6
R3
R4
O17
P17
P16
Q17
L14
USL11
USL12
DTE_ESCAPE_CMD
Input
Output
Output
Useless
MOD_RESET_STATE
Output
MOD_UART_STATE
Output
MOD_FLOW_STATE
Output
MOD_ON_STATE
Output
MOD_ON*_CMD
SIMVCC
SIMRST
SIMCLK
SIMIO
SIMCD
HSMICIP
Input
Output
Output
Output
In/output
Input
Input
HSMICIN
HSOL
HSGND
HSOR
MICIP
Input
Output
Output
Output
Input
Useless
ON signal
SIM interface
To external
microphone
(accessory)
To external stereo
speaker
(accessory)
Microphone
interface
Command mode request signal
(from DTE to XS200) interrupt
Command mode request signal
(from XS200 to DTE)
Signal showing a RESET
occurrence of the module
Signal giving the state of the
serial link in the module
Signal giving the state of the
module
Signal giving the state of the
module
Module ON signal
SIM power supply
SIM reset
SIM clock
SIM data
SIM insertion detection
Differential input from
microphone
Differential input from
microphone
Differential output to earphone
Differential input to handset
microphone
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M15
M14
L13
M13
M12
M16
L15
B10
T7
T8
T9
T10
B12
O15
P14
O14
N12
O13
R15
page 44/61
MICIN
Input
HPP32
Output
HPN32
Output
HPP8
Output
HPN8
Output
USL13
RI
DSR
DCD
DTR
CTS
RTS
TXD1
RXD1
TXD2
RXD2
TXIR
RXIR
CMDIRDA
USL14
USL15
USL16
DTE_UART*_STATE
CHARGEUR
VCCS
LEDC
MOD_RESET_CMD
MOD_OFF*_CMD
USL17
USL18
USL19
USL20
USL21
USL22
USL23
USL24
USL25
USL26
USL27
USL28
USL29
USL30
Output
Output
Output
Output
Input
Output
Input
Output
Input
Output
Input
Output
Input
Output
Input
Output
In/out
Input
Input
Input
Output
Input
Input
In/output
In/output
In/output
In/output
In/output
In/output
In/output
In/output
In/output
In/output
In/output
In/output
In/output
In/output
Earphone interface
Useless
V24 interface with
flow control
UART2 interface
IRDA interface
Useless
Battery charging
interface
Reset
Useless
Differential input to handset
microphone
Differential output to 32ohms
handset earphone
Differential output to 32ohms
handset earphone
Differential output to 8ohms
handset earphone
Differential output to 8ohms
handset earphone
Ring Indicator
Data Send Ready
Data Carrier Detect
Data Terminal Ready
Clear To Send
Request To Send
UART transmit 1
UART receive 1
UART transmit 2
UART receive 2
Signal giving the state of the DTE
Charge
Charge indicator
Module Reset system signal
Module OFF signal interrupt
-
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Q15
N11
O11
O10
N10
M17
N5
E3
E2
D3
C5
D4
B5
B7
B8
B9
B6
D7
C7
Q3
C11
B11
H6
O3,O4,O5
M6
L6
P4
N6
K5
K4
K3
K2
J2
J3
J4
I4
I3
I2
H2
H3
H4
G4
page 45/61
USL31
USL32
USL33
USL34
USL35
USL36
USL37
USL38
USL39
USL40
USL41
USL42
USL43
USL44
USL45
USL46
USL47
USL48
USL49
USL50
USL51
DTE_RESET*_CMD
USL52
USL53
USL54
TSPACTEXT
USL56
USL57
USL58
USL59
USL60
USL61
USL62
USL63
USL64
USL65
USL66
USL67
USL68
USL69
USL70
USL71
USL72
USL73
USL74
USL75
In/output
In/output
Output
Output
Output
Output
Output
Output
In/output
In/output
In/output
In/output
In/output
In/output
In/output
In/output
Output
Output
Output
Output
Output
Output
In/output
In/output
Input
Output
In/output
In/output
Input
Output
Output
In/output
In/output
In/output
In/output
In/output
In/output
In/output
In/output
Output
Output
Input
Output
Output
Output
Output
Useless
Useless
DTE reset signal
-
Useless
-
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G3
G2
I5
F5
F6
F4
F3
F2
I13
N18
L16
I12
G17
K15
H15
I15
I14
H13
G12
I16
J16
N2
N16
N17
T15
C17
Q8
Q9
O16
M8
K12
D10
C4
C8
E11
EC6
F10
C9
D5
L3
M5
C10
L5
L4
C15
H12
page 46/61
USL76
USL77
USL78
USL79
USL80
USL81
USL82
USL83
USL84
USL85
USL86
USL87
USL88
CLK26M
CLK13M
CLK32K
USL89
USL90
USL91
USL92
USL93
IO5
IO6
IO7
IO11
LEDR
LEDG
IO13 (LEDB)
VBAT
VRIO
VBACKUP
GND
ANTENNE
TCK
TMS
TDIDIGIT
TDODIGIT
TDIANALOG
TDOANALOG
BSCAN*
EMU0*
EMU1*
NC
Output
Output
Output
Output
Input
Output
In/output
In/output
In/output
In/output
Output
Output
Input
Output
Output
Output
Input
Input
Output
In/output
In/output
In/output
In/output
In/output
output
output
output
output
Input
Output
Input
Ground
Output/input
Input
Input
Input
Output
Input
Output
Input
Output
Output
NC
Clocks
Useless
26MHz analog clock output
13MHz digital clock output
32KHz digital clock output
With Pull down
With pull down
With pull down
With pull-up
+2.8V output power supply
GND
Antenna connection (50 ohms)
I9
E4
D9
D6
D8
E8
D12
B15
B16
B17
D11
B13
C12
T19
L12
R7
Q5
C13
D13
E12
E9
N4
N3
J5
E17
P2
Q2
B14
F19,F20,F2
1,F22,F23,G
19,G20,H19,
H20
Q4
P5
Other
I23
JTAG
JTAG
JTAG
JTAG
JTAG
JTAG
JTAG
For debug
For debug
Not connected
T11
T14
C14
D17
R9
P7
D16
C18
B18
Q21,R21,R2
LED
Power supply
Ground
Antenna
input/output
JTAG interface
(SAGEM use only)
+3.8V battery power supply
(nominal)
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0,S20, L1,
P3, Q6, R5,
O2
* active on low electrical state
WARNING:
The USL signals are useless in XS200 versions but are physically connected to the balls.
These "Useless" signals shall not be connected to others signals (or ground) on the mother board (board
developed by XS200 customer), except USL90 and USL92 that shall be connected to pull-down resistors
100K.
The NC signals shall not be connected to any other signal neither to ground on the mother board.
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5. ELECTRICAL SPECIFICATION
VOH
VOL
VIH
VIL
High level output voltage
Low level output voltage
High level input voltage
Low level input voltage
5.1 VBAT
The module is supplied through the VBAT signal with the following characteristics:
Parameter
Name
Min
Typ
Max
VBAT period (ms)
VbatTe (*)
4.614
4.615
DC
VBAT low duration VbatTi (*)
550
VBAT period
(us)
VBAT rise time (us) VbatTr (*)
0
VBAT fall time (us) VbatTf (*)
0
VBAT
maximum VbatMax (*)
4.5
voltage (V)
VBAT
minimum VbatMin (*)
3.45
voltage (V)
VBAT drop voltage DeltaVbat (*)
450 (**)
(mV)
Transient
voltage
3.2
(V)
Noise level (Vrms)
50mV
@100MHz-1MHz
(*): cf figure 8.
(**): for a new battery. Of course for an old battery, this value will be higher and will create a reset (without
MMI message) of the mobile phone when the battery begins to be discharged.
Figure 8
VBAT voltage waveform
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5.2 VRIO
Signal
Voltage level (activ
mode)
Voltage level (sleep
mode)
Current capability
Active mode
Current capability
Sleep mode
Rise time
Min
Typ
Max
2.70V
2.80V
2.90V
2.70V
2.80V
3.00V
-
-
10mA
-
-
0.5mA
-
10µs
-
Remarks
5.3 DAI INTERFACE
DAIRST, DAIIN, DAICLK and DAIOUT have the following characteristics:
Signal
VL (V)
VH (V)
Remarks
Min
Max
Min
Max
DAIRST
-0.5
+0.8
+2.03
+3.2
DAICLK
-0.5
+0.8
+2.03
+3.2
PD 100K
DAIIN
-0.5
+0.8
+2.03
+3.2
PD 100K
DAIOUT
+0.59
+2.32
-
5.4 NETWORK LED
LEDR and LEDG have the following characteristics:
Signal
VL (V)
VH (V)
Min
Max
Min
LEDR (out)
+0.59
+2.32
LEDG (out)
+0.59
+2.32
LEDB / IO13 CDMMC
+0.59
+2.32
(out)
LEDG: Imax = 2mA
LEDR: Imax = 4mA
Remarks
State after RESET
Remarks
State after RESET
Max
-
5.5 SIM
Signal
VL (V)
Min
Max
VH (V)
Min
Max
SIMRST
SIMCLK
SIMIO
Fully
compliant to
Fully compliant to the GSM11.11 and
the GSM11.11
ISO/IEC 7816-3 standards
and ISO/IEC
7816-3
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SIMVCC
SIMCD
5.6 V24 (UART 1)
TXD,RXD,CTS, RTS, DCD, DSR, DTR and RI have the following characteristics:
Signal
VL (V)
VH (V)
Remarks State after reset
Min
Max
Min
Max
RTS
-0.5
+0.8
+2.03
+3.2
PU 100K
RI
+0.59
+2.32
CTS
+0.59
+2.32
DSR
+0.59
+2.32
PD
DCD
+0.59
+2.32
PU 10K
DTR
-0.5
+0.8
+2.03
+3.2
PU 100K
TXD1
+0.59
+2.32
RXD1
-0.5
+0.8
+2.03
+3.2
PU 10K
Signals CTS, RTS, DCD, DSR, DTR and RI have following characteristics:
ON
OFF
Logical level
Active
Inactive
Electrical level
Low level (~0V)
High level (~3V)
5.7 UART2
TXD2 and RXD2 have the following characteristics:
Signal
VL (V)
VH (V)
Min
Max
Min
RXD2
-0.5
+0.8
+2.03
TXD2
+0.59
+2.32
Remarks
Max
+3.2
-
State after RESET
PU 100K
5.8 IRDA
RXIR, TXIR and CMDIRDA have the following characteristics:
Signal
VL (V)
VH (V)
Min
Max
Min
Max
RXDIR
-0.5
+0.8
+2.03
+3.2
TXIR, CMDIRDA
+0.59
+2.32
-
Remarks
State after RESET
PU 100K
5.9 DATA / COMMAND MULTIPLEXING
MOD_ESCAPE*_CMD and DTE_ESCAPE_CMD have the following characteristics:
Signal
VL (V)
VH (V)
Remarks State after reset
Min
Max
Min
Max
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MOD_ESCAPE*_CMD
DTE_ESCAPE_CMD
-0.5
+0.8
+2.03
+3.2
PU
ESD
protection
-
+0.59
+2.32
-
ESD
protection
5.10 POWER MANAGEMENT
They have the following characteristics:
Signal
VL (V)
Min
Max
MOD_RESET_STATE,
+0.59
MOD_UART_STATE,
MOD_FLOW_STATE,
MOD_ON_STATE
MOD_ON*_CMD
0.3*VBAT
DTE_UART*_STATE
DTE_RESET*_CMD
MOD_OFF*_CMD
-0.5
-0.5
+0.8
+0.59
+0.8
VH (V)
Min
+2.32
Remarks
Max
-
0.7*VBAT
-
+2.03
+2.32
+2.03
+3.2
+3.2
State after RESET
ESD protection
PU
Ton min: 33 ms *
Programmable PU
PU
Pulse duration in
functional mode:
77ns min.
* Note: The necessary pulse duration on MOD_ON*_CMD is given for +25°C. This duration increases to
around 1 second minimum when the module is used at –30°C.
5.11 AUDIO SIGNALS
Audio Inputs
Parameter
Maximum
input
(MICIP-MICIN)
Maximum
Input
(HSMICP-HSMICN)
Nominal
reference
(MICIP-MICIN)
Tests Conditions
Min
range Inputs 3 dBm0 (Maximum digital sample
amplitude with PGA gain set to 0dB)
Inputs 3 dBm0 (Maximum digital sample
Range
amplitude with PGA gain set to 0dB),
"differential amplifier" (Gain=25.6 dB)
level
Nominal reference level at
"differential amplifier" (Gain=25.6 dB)
(HSMICP-HSMICN)
Differential input resistance
(MICIP-MICIN)
Differential input resistance
"differential amplifier" (Gain=25.6 dB)
(HSMICP-HSMICN)
Micro amplifier gain (MICIPMICIN)
Micro
amplifier
gain
"differential amplifier"
(HSMICP-HSMICN)
Typ
Max
Units
32.5
mVrms
32.5
mVrms
-10
dBm0
-10
dBm0
36
kΩ
36
kΩ
25.6
dB
25.6
dB
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page 52/61
Audio Outputs
Parameter
Differential Minimum resistive load
between HPP32 and HPN32 ; R//
Tests Conditions
Min
Typ
Max
Units
Output swing 3.9 Vpp
120
Ω
Output swing 1.5 Vpp
33
Ω
Differential Maximum capacitor
load between HPP32 and HPN32;
C//
Common mode Minimum resistive
load at HPP32 and HPN32
Common mode Maximum load at
HPP32 and HPN32
Minimum resistive load at HSOL
and HSOR: R//
Maximum capacitor load at HSOL
and HSOR: C//
Differential Minimum resistive load
Output swing 4.38 Vpp
between HPP8 and HPN8: R//
Differential Maximum capacitor
load between HPP8 and HPN8:
C//
Common mode Minimum resistive
load at HPP8 and HPN8
Common
mode
Maximum
capacitor load at HPP8 and HPN8
100
pF
kΩ
200
10
pF
Ω
32
100
pF
Ω
8
100
pF
kΩ
200
10
pF
Global Characteristics
Parameter
Tests Conditions
Distortion ≤ 2% and 120 Ω
Earphone Maximum output
Distortion ≤ 2% and 33 Ω input level = swing at HPP32 - HPN32
5.34dBm0
Earphone amplifier gain
Headphone Maximum output
Distortion ≤ 2% and 32 Ω
swing at (HSOL/R)
Headphone L/R amplifier gain
Distortion ≤ 2% and 8 Ω, VCCSPK = 3.2v,
Pout=340mW, SPKG = 0
Distortion ≤ 2% and 8 Ω, VCCSPK = 3.2v,
Speaker maximum output at
Pout=380mW, SPKG = 1, VSP input
HPP8 - HPN8
level=-2.5dBm0
Distortion ≤ 5% and 8 Ω, VCCSPK = 3.2v,
Pout=430mW, SPKG = 1, VSP input
level=-2dBm0
Speaker amplifier gain
SPKG=0
Min
Typ
3.1
3.92
1.2
1.5
1.6
Max Units
Vpp
1
dB
1.96
Vpp
-5
dB
3.73
4.66
3.96
4.95
4.2
5.24
2.5
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Vpp
dB
page 53/61
SPKG=1
8.5
5.12 CHARGER
Charger has the following characteristics:
Parameter
Description
VCHARGEUR
Charger voltage
See details on Application Note
MIN
Max
6V
7V
5.13 RESET
MOD_RESET_CMD is active at high state.
It has the following characteristics:
Signal
Min
VL (V)
VH (V)
Treset (ms)
0.8 VBAT
65
Max
Remarks
0.2 VBAT
-
PD 100K
NB: The reset signal resets all the system including backup.
5.14 SPARE IO
IO5, 6, 7,11 have the following characteristics:
Signal
VL (V)
VH (V)
Min
Max
Min
Input
-0.5
+0.8
+2.03
Output
+0.59
+2.32
Iout max = 2mA
Remarks
Max
+3.2
-
IO 5,6,7: prog PD
IO11: prog PU
5.15 CLOCKS
CLK13M and CLK32K have the following characteristics:
Signal
VL (V)
VH (V)
Min
Max
Min
Max
CLK13M
+0.59
+2.32
CLK32K
0,297
1,32
CLK26M has the following characteristics:
Signal
Vmin (V)
Vmax (V)
CLK26M
0.5V
Remarks
Remarks
2V
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State after RESET
page 54/61
5.16 JTAG INTERFACE
TCLK, TMS, TDI, TDODIGIT, TDIANALOG, BSCAN*, EMU0*, EMU1* have the following characteristics:
Signal
VL (V)
VH (V)
Remarks
Min
Max
Min
Max
TMS,
TDI,
-0.5
+0.8
+2.03
+3.2
PU
TDIANALOG,
BSCAN*
TCK
-0.5
+0.8
+2.03
+3.2
PD
TDODIGIT,
+0.59
+2.32
TDOANALOG,
EMU0*, EMU1*
+0.59
+2.32
PU
6. ENVIRONMENTAL SPECIFICATION
Min
Max
Parameter
Ambient temperature
-10°C
+55°C
Normal range
Ambient temperature
-30°C
+75°C
Extended range
Storage temperature
-40°C
+85°C
Long damp heat
Tested at +60°C, 95% RH during 504 hours
Operating conditions
Short damp heat
Tested at +40°C, 95% RH during 96 hours
Storage
and
transportation conditions
Normal Range, from -10°c to +55°C:
Inside this normal range, full compliance with GSM standards is guaranteed by SAGEM.
Certification tests reports applies to modules operating in this interval.
Extended Range, from -30°c to -10°c and from +55°c to +75°C:
Inside this extended range, the operability is guaranteed by SAGEM. However, there is not a full certification test report
in this range. Practically, SAGEM performs non regression tests in this range in order to ensure that the module can
attach to the network and handle a call. Some performances may remain under the normal GSM expectation (sensitivity,
RXlev 1 or 2 dB lower, TX emitting power slightly weaker).
Out of operational range:
No operation is guaranteed by SAGEM out of the operational range. No operating tests are made below 30°c and above +75°C.
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page 55/61
7. MECHANICAL SPECIFICATION
7.1 PHYSICAL DIMENSIONS
Notes :
- All linear dimensions are in
millimeters.
- Dimensions are for a reported
XS200.
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page 56/61
Anchor pad (x4)
Notes :
-
-
Anchor
pads
are
electrically connected
signal).
Ball pads are SMD.
Missing ball
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not
(no
page 57/61
7.2 TERMINAL ASSIGNMENTS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND TXD1 TXIR RXD1 TXD2 RXD2 MOD_ USL16 SIMCD USL87 LEDB USL83 USL84 USL85 EMU1
ON*_C
*
MD
GND USL62 CTS USL65 CMDI USL63 USL67 USL71 USL15 USL88 USL90 TDIDI USL74 GND USL55 EMU0
RDA
GIT
*
GND
GND
GND
GND
GND
GND BSCA TDODI GND
N*
GIT
GND
GND
GND
GND
GND
GND
GND
IO11
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND VBAT VBAT VBAT VBAT VBAT
GND
GND
GND USL43 GND VBAT VBAT
A
B
C
D
GND
DTR
RTS USL68 USL79 RXIR USL80 USL78 USL61 USL86 USL82 USL91 GND
E GND
DCD
DSR USL77 GND
GND
GND USL81 USL93 GND USL64 USL92 GND
F GND USL38 USL37 USL36 USL34 USL35 GND
GND
GND USL66 GND
G GND USL32 USL31 USL30 GND
GND
GND
GND
GND
GND USL49 GND
H GND USL27 USL28 USL29 GND DTE_U GND
GND
GND
GND
GND USL75 USL48 GND USL45 GND
GND
GND
GND
20
21
22
23
GND
GND
GND
GND
GND VBAT VBAT
GND
GND
GND
ART*_
STATE
I GND USL26 USL25 USL24 USL33 GND GND
GND USL76 GND
GND USL42 USL39 USL47 USL46 USL50 GND
GND
GND
GND
GND
GND ANTE
NNE
J GND USL21 USL22 USL23 IO7
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND CLK13 DTE_E MOD_ MOD_ USL41 GND GND GND
M SCAPEESCAPON_ST
*_CM E*_CM ATE
D
D
GND GND MOD_ MOD_ USL12 USL11 MOD_ USL13 GND GND
UART RESET
FLOW
_STAT _STAT
_STAT
E
E
E
HPN8 HPP32 HSGN GND GND GND USL52 USL53 USL40 GND
D
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
HPP8 HPN32 GND HSOR HSOL HSMIC USL58 USL7
IP
GND
GND
GND
GND
GND
GND
K GND USL20 USL19 USL18 USL17 GND
GND
GND
GND
GND
GND USL60 GND
DAICL USL69 USL73 USL72 LEDC GND
K
GND
GND
GND
L
NC
M GND DAIIN DAIO DAIRS USL70 VCCS GND USL59 GND
UT
T
N GND DTE_R IO6
IO5
RI
ESET*
_CMD
O GND NC CHAR CHAR CHAR
GEUR GEUR GEUR
P GND LEDR
MOD_ GND
OFF**
_CMD
GND GND
GND
GND
GND
GND
MOD_ VBAC GND TDOA GND GND GND
RESET KUP
NALO
_CMD
Q GND LEDG USL14 VRIO USL89 NC GND USL56 USL57 GND
R
S
T
U
GND
NC
USL5 USL6
GND
GND
GND
GND USL51 GND
GND USL44 GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND HSMIC GND
IN
GND
GND
GND
GND MICIN GND USL10 GND
GND
GND
GND
GND MICIP GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
USL1
GND SIMVC SIMRS SIMCL SIMIO TCK
C
T
K
GND
GND
TMS USL54 GND
GND
GND CLK26 GND
M
GND
GND
GND
GND
GND
GND
GND
NC
GND CLK32 GND TDIAN GND
K
ALO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
USL9 USL8
GND
GND
USL2 USL3 USL4
GND
GND
GND
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GND TSPCL GND
K
GND TSPDI TSPEN GND
I*
GND TSPDO GND
GND
page 58/61
ANNEXE 1 : IO description
IO name
DAIRST
DAIOUT
DAIIN
DAICLK
USL1
USL2
USL3
USL4
USL5
USL6
USL7
USL8
USL9
USL10
MOD_ESCAPE*_CMD
USL11
USL12
DTE_ESCAPE*_CMD
MOD_RESET_STATE
MOD_UART_STATE
MOD_FLOW_STATE
MOD_ON_STATE
MOD_ON*_CMD
SIMVCC
SIMRST
SIMCLK
SIMIO
SIMCD
HSMICIP
HSMICIN
HSOL
HSGND
HSOR
MICIP
MICIN
HPP32
HPN32
HPP8
HPN8
USL13
RI
Type
Digital bi directional buffer (IDI041/OUK431)
Digital bi directional buffer (IDI041/OUK431)
Digital bi directional buffer (IDI041/OUK431). Pull down
Digital bi directional buffer (IDI041/OUI431). Pull down
Digital input buffer (IDI041/PS0201)
Digital output buffer (OUK431)
Digital output buffer (OUI431)
Digital output buffer (OUK431)
Digital output buffer (OUK431)
Digital bi directional buffer (IDG091/OUI431/PE1001)
Digital bi directional buffer (IDI041/OUI431/PS1001)
Digital bi directional buffer (IDI041/OUI431/PS1001)
Digital bi directional buffer (IDI041/OUI431/PS1001)
Digital bi directional buffer (IDI041/OUI431/PS1001)
Digital bi directional buffer (IDI041/OUI431/PS1001)
Digital bi directional buffer (IDI041/OUI431/PS1001)
Digital output buffer (OUO431)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital input
Power supply output
Digital output buffer
Digital output buffer
Digital bi directional buffer
Digital input buffer (IDI091)
Analog audio input
Analog audio input
Analog audio output
Analog audio output
Analog audio output
Analog audio input
Analog audio input
Analog audio output
Analog audio output
Analog audio output
Analog audio output
Digital bi directional buffer (IDG091/OUI431/PE1001)
Digital bi directional buffer (IDG091/OUO431/PS1001)
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Pin N°
M4
M3
M2
L2
T5
S4
S5
S6
R3
R4
O17
P17
P16
Q17
L14
M15
M14
L13
M13
M12
M16
L15
B10
T7
T8
T9
T10
B12
O15
P14
O14
N12
O13
R15
Q15
N11
O11
O10
N10
M17
N5
page 59/61
DSR
DCD
DTR
CTS
RTS
TXD1
RXD1
TXD2
RXD2
TXIR
RXIR
CMDIRDA
USL14
USL15
USL16
DTE_UART*_STATE
CHARGEUR
LEDC
MOD_RESET_CMD
MOD_OFF*_CMD
USL17
USL18
USL19
USL20
USL21
USL22
USL23
USL24
USL25
USL26
USL27
USL28
USL29
USL30
USL31
USL32
USL33
USL34
USL35
USL36
USL37
USL38
USL39
USL40
USL41
USL42
Digital bi directional buffer (IDG091/OUI431/PE1001)
Digital output buffer (OUI831)
Digital bi directional buffer (IDI091/OUI831)
Digital output buffer (OUI831)
Digital bi directional buffer (IDI091/OUO431)
Digital output buffer (OUI831)
Digital bi directional buffer (IDI091/OUI831)
Digital output buffer (OUI831)
Digital input buffer (IDI091)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI091/OUK431)
Digital output buffer (OUK431)
Digital bi directional buffer (IDG091/OUI431/PS1001)
Digital bi directional buffer (IDI091/UOS205)
Digital bi directional buffer (IDI091/UOS205)
Digital bi directional buffer (IDG091/OUI431/PS1001)
Power supply input
Analog output
Digital input
Digital bi directional buffer (IDI091/OUI431/PS1001)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital output buffer (OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI831)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
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E3
E2
D3
C5
D4
B5
B7
B8
B9
B6
D7
C7
Q3
C11
B11
H6
O3,O4,O5
L6
P4
N6
K5
K4
K3
K2
J2
J3
J4
I4
I3
I2
H2
H3
H4
G4
G3
G2
I5
F5
F6
F4
F3
F2
I13
N18
L16
I12
page 60/61
USL43
USL44
USL45
USL46
USL47
USL48
USL49
USL50
USL51
DTE_RESET*_CMD
USL52
USL53
USL54
USL55
USL56
USL57
USL58
USL59
USL60
USL61
USL62
USL63
USL64
USL65
USL66
USL67
USL68
USL69
USL70
USL71
USL72
USL73
USL74
USL75
USL76
USL77
USL78
USL79
USL80
USL81
USL82
USL83
USL84
USL85
USL86
USL87
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital bi directional buffer (UIS245/UOS181)
Digital bi directional buffer (UIS245/UOS181)
Power supply input
Digital output buffer (OUI831)
Digital bi directional buffer (IDG091/OUM431/PE0201)
Digital bi directional buffer (IDG091/OUI831)
Digital output buffer (IDG091)
Digital input buffer (OUM431)
Digital output buffer (OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital bi directional buffer (IDG091/OUI431/PE1001)
Digital bi directional buffer (IDG091/OUI431/PS1001)
Digital bi directional buffer (IDG091/OUI431/PS1001)
Digital bi directional buffer (IDG091/OUO431/PS1001)
Digital bi directional buffer (IDG091/OUI431/PS1001)
Digital bi directional buffer (IDI091/OUI831/PS1001)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital output buffer (OUI431)
Digital bi directional buffer (IDI041/OUI431)
Digital output buffer (OUI431)
Digital bi directional buffer (IDG091/OUM431/PS0201)
Digital bi directional buffer (IDG091/OUM431/PS0201)
Digital bi directional buffer (IDG091/OUM431/PS0201)
Digital bi directional buffer (IDG091/OUM431/PS0201)
Digital bi directional buffer (IDG091/OUI431)
Digital output buffer (OUI431)
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G17
K15
H15
I15
I14
H13
G12
I16
J16
N2
N16
N17
T15
C17
Q8
Q9
O16
M8
K12
D10
C4
C8
E11
C6
F10
C9
D5
L3
M5
C10
L5
L4
C15
H12
I9
E4
D9
D6
D8
E8
D12
B15
B16
B17
D11
B13
page 61/61
USL88
CLK26M
CLK13M
CLK32K
USL89
USL90
USL91
USL92
USL93
IO5
IO6
IO7
IO11
LEDR
LEDG
IO13(LEDB)
VBAT
Digital bi directional buffer (IDG091/OUM431/PS1001)
Analog Clock ouptut
Digital bi directional buffer (IDI041/OUI831)
Digital output buffer (OUK431)
Analog input
Digital input buffer (IDG091)
Digital output buffer (OUM431)
Digital bi directional buffer (IDG091/OUM431)
Digital bi directional buffer (IDG091/OUM431)
Digital bi directional buffer (IDG091/OUI431/PE1001)
Digital bi directional buffer (IDG091/OUI431/PE1001)
Digital bi directional buffer (IDG091/OUI431/PS1001)
Digital bi directional buffer (IDG091/OUO431/PS1001)
Digital output buffer (OUI831)
Digital output buffer (OUK431)
Digital bi directional buffer (IDG091/OUI431/PS0201)
Power supply input
VRIO
VBACKUP
ANTENNE
TCK
TMS
TDIDIGIT
TDODIGIT
TDIANALOG
TDOANALOG
BSCAN*
EMU0*
EMU1*
Power supply output
Power supply input
Analog bi directional HF
Digital input buffer (IDI091/ PE0201)
Digital input buffer (IDI091/ PS0201)
Digital input buffer (IDI091/ PS0201)
Digital bi directional buffer (OUI431)
Digital bi directional buffer
Digital bi directional buffer
Digital input buffer (IDI041/ PS0201)
Digital bi directional buffer (IDI091/OUO431/PS1001)
Digital bi directional buffer (IDI091/OUO431/PS1001)
OUO231 : rated output current = 1mA (with Voh = Vccmin)
OUI431, OUK431, OUO431 :rated output current = 2mA (with Voh = Vccmin)
OUI831, OUK831 : rated output current = 4mA (with Voh = Vccmin)
--END OF DOCUMENT
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Note d’étude / Technical document :
Erreur! Source du renvoi introuvable.–
5608.1– 012 / 69255 Edition Erreur! Source du renvoi introuvable.
Document Sagem Communication Reproduction et divulgation interdites
Sagem Communication document. Reproduction and disclosure prohibited
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